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Sat, 14 Dec 2024 09:26:39 -0800 (PST) From: Anup Patel To: Thomas Gleixner Subject: [PATCH v2 05/11] genirq: Introduce kconfig option GENERIC_PENDING_IRQ_CHIPFLAGS Date: Sat, 14 Dec 2024 22:55:43 +0530 Message-ID: <20241214172549.8842-6-apatel@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241214172549.8842-1-apatel@ventanamicro.com> References: <20241214172549.8842-1-apatel@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241214_092641_573994_D5926CD4 X-CRM114-Status: GOOD ( 19.58 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anup Patel , Andrew Lunn , imx@lists.linux.dev, Marc Zyngier , Sascha Hauer , Atish Patra , linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Palmer Dabbelt , Pengutronix Kernel Team , Paul Walmsley , Anup Patel , Andrew Jones , Shawn Guo , Gregory Clement , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Thomas Gleixner Introduce kconfig option GENERIC_PENDING_IRQ_CHIPFLAGS which allows irq core to set IRQD_MOVE_PCNTXT flag based on IRQCHIP_MOVE_DEFERRED flag. This kconfig option will help architectures such as x86 and RISC-V to mark top-level irqchip instances where irqs can't be moved in the process context. Signed-off-by: Thomas Gleixner Signed-off-by: Anup Patel --- include/linux/irq.h | 10 ++++++++++ kernel/irq/Kconfig | 4 ++++ kernel/irq/chip.c | 39 ++++++++++++++++++++++++++++++++++++--- kernel/irq/irqdomain.c | 1 + 4 files changed, 51 insertions(+), 3 deletions(-) diff --git a/include/linux/irq.h b/include/linux/irq.h index fa711f80957b..b689c8fe8d60 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -567,6 +567,7 @@ struct irq_chip { * in the suspend path if they are in disabled state * IRQCHIP_AFFINITY_PRE_STARTUP: Default affinity update before startup * IRQCHIP_IMMUTABLE: Don't ever change anything in this chip + * IRQCHIP_MOVE_DEFERRED: Move the interrupt in actual interrupt context */ enum { IRQCHIP_SET_TYPE_MASKED = (1 << 0), @@ -581,6 +582,7 @@ enum { IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND = (1 << 9), IRQCHIP_AFFINITY_PRE_STARTUP = (1 << 10), IRQCHIP_IMMUTABLE = (1 << 11), + IRQCHIP_MOVE_DEFERRED = (1 << 12), }; #include @@ -634,6 +636,14 @@ static inline void irq_move_masked_irq(struct irq_data *data) { } static inline void irq_force_complete_move(struct irq_desc *desc) { } #endif +#if defined(CONFIG_GENERIC_PENDING_IRQ_CHIPFLAGS) +void irq_update_pcntxt_flag(unsigned int irq, const struct irq_chip *chip); +#else +static inline void irq_update_pcntxt_flag(unsigned int irq, const struct irq_chip *chip) +{ +} +#endif + extern int no_irq_affinity; #ifdef CONFIG_HARDIRQS_SW_RESEND diff --git a/kernel/irq/Kconfig b/kernel/irq/Kconfig index 529adb1f5859..6d85a47fbf41 100644 --- a/kernel/irq/Kconfig +++ b/kernel/irq/Kconfig @@ -31,6 +31,10 @@ config GENERIC_IRQ_EFFECTIVE_AFF_MASK config GENERIC_PENDING_IRQ bool +# Deduce delayed migration from top-level interrupt chip flags +config GENERIC_PENDING_IRQ_CHIPFLAGS + bool + # Support for generic irq migrating off cpu before the cpu is offline. config GENERIC_IRQ_MIGRATION bool diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c index 271e9139de77..623959a24464 100644 --- a/kernel/irq/chip.c +++ b/kernel/irq/chip.c @@ -33,6 +33,33 @@ struct irqaction chained_action = { .handler = bad_chained_irq, }; +#ifdef CONFIG_GENERIC_PENDING_IRQ_CHIPFLAGS +static void __irq_update_pcntxt_flag(struct irq_desc *desc, + const struct irq_chip *chip) +{ + if (chip) { + if (chip->flags & IRQCHIP_MOVE_DEFERRED) + irqd_clear(&desc->irq_data, IRQD_MOVE_PCNTXT); + else + irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT); + } +} + +void irq_update_pcntxt_flag(unsigned int irq, const struct irq_chip *chip) +{ + unsigned long flags; + struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0); + + __irq_update_pcntxt_flag(desc, chip); + irq_put_desc_unlock(desc, flags); +} +#else +static inline void __irq_update_pcntxt_flag(struct irq_desc *desc, + const struct irq_chip *chip) +{ +} +#endif + /** * irq_set_chip - set the irq chip for an irq * @irq: irq number @@ -47,6 +74,7 @@ int irq_set_chip(unsigned int irq, const struct irq_chip *chip) return -EINVAL; desc->irq_data.chip = (struct irq_chip *)(chip ?: &no_irq_chip); + __irq_update_pcntxt_flag(desc, chip); irq_put_desc_unlock(desc, flags); /* * For !CONFIG_SPARSE_IRQ make the irq show up in @@ -1114,16 +1142,21 @@ void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set) trigger = irqd_get_trigger_type(&desc->irq_data); irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU | - IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT); + IRQD_TRIGGER_MASK | IRQD_LEVEL); if (irq_settings_has_no_balance_set(desc)) irqd_set(&desc->irq_data, IRQD_NO_BALANCING); if (irq_settings_is_per_cpu(desc)) irqd_set(&desc->irq_data, IRQD_PER_CPU); - if (irq_settings_can_move_pcntxt(desc)) - irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT); if (irq_settings_is_level(desc)) irqd_set(&desc->irq_data, IRQD_LEVEL); + /* Keep this around until x86 is converted over */ + if (!IS_ENABLED(CONFIG_GENERIC_PENDING_IRQ_CHIPFLAGS)) { + irqd_clear(&desc->irq_data, IRQD_MOVE_PCNTXT); + if (irq_settings_can_move_pcntxt(desc)) + irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT); + } + tmp = irq_settings_get_trigger_mask(desc); if (tmp != IRQ_TYPE_NONE) trigger = tmp; diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c index ec6d8e72d980..ec5fc1d8cebe 100644 --- a/kernel/irq/irqdomain.c +++ b/kernel/irq/irqdomain.c @@ -1508,6 +1508,7 @@ int irq_domain_set_hwirq_and_chip(struct irq_domain *domain, unsigned int virq, irq_data->hwirq = hwirq; irq_data->chip = (struct irq_chip *)(chip ? chip : &no_irq_chip); irq_data->chip_data = chip_data; + irq_update_pcntxt_flag(virq, chip); return 0; }