| Message ID | 20250102194530.418127-3-e@freeshell.de (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | riscv: dts: starfive: jh7110-common: Sync downstream U-Boot changes | expand |
diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi index 55c6743100a7..651f9a602226 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi @@ -317,8 +317,8 @@ &qspi { nor_flash: flash@0 { compatible = "jedec,spi-nor"; reg = <0>; - cdns,read-delay = <5>; - spi-max-frequency = <12000000>; + cdns,read-delay = <2>; + spi-max-frequency = <100000000>; cdns,tshsl-ns = <1>; cdns,tsd2d-ns = <1>; cdns,tchsh-ns = <1>;
Sync qspi flash setting to read-delay=2 and spi-max-frequency 100MHz for better compatibility with operating system and downstream boot loader SPL secondary program loader. Signed-off-by: E Shattow <e@freeshell.de> --- arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)