From patchwork Tue Jan 7 07:58:35 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Vladimir Kondratiev X-Patchwork-Id: 13928349 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D9BC1E77197 for ; Tue, 7 Jan 2025 08:02:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=5l4i6M7tA2RE+IWlfSHpD6CoGxPSr/3O4QSdhQ1uF88=; b=cI02mr0cphgswo Rm4TcMb0dwDK3a5nHk7RUXBtVKmJ58F/PH7uLRQW7hOsl4o1KNlbvpD38jo22Jo24c43y9jEFbK/u CPXOqqh5PALGB22+UIEFHtVSoIwRESKMvqI6To92cjN9lvyoJa9afzOlmnYg8XjJVZNe4xWsgAoby 85ulk5opkr2hM0rfwG6TPoTzVvnfWbtk4tsLISv/tnxiQuMXOIxvMzonANWOQwrfUrmi/ZHDaInqb 6dADk2olydcjLFBtUmUiNPe8afF1SwauP/XdEdLSjssml7svXtkWvgew66wZxYTn/ePQQSGO0ipyX /auPA5anc6EaLH0xRStA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tV4XG-00000003pzH-3GOH; Tue, 07 Jan 2025 08:01:58 +0000 Received: from esa1.hc555-34.eu.iphmx.com ([23.90.104.144]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tV4Ud-00000003pLX-1bMG for linux-riscv@lists.infradead.org; Tue, 07 Jan 2025 07:59:19 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=mobileye.com; i=@mobileye.com; q=dns/txt; s=MoEyIP; t=1736236755; x=1767772755; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=f+e67DkeUVPkZicopwTlBfVGta3FJLTOXv3gUbRrxS8=; b=V0WaGCncojFR4htQTKS6zBSYaFH7JWssh0ncYcFGZWx/xZlZkMW88OYW o7OpJxa2ccOQbYfr7xqzzE5hghc5cZ2JBFCtemTPcw1pH2x1FnzCU9V1l Ms1n3R1TrYZSBknEqglSTMwDVebJMdFyCNImJcB4OP0p1Bgujhe5PEN40 1hjy1LqcWLN9LTpWk7G2VmSDSqN01SliJn0q42uCe7HAK0aC3t0OkeDSZ gHUQoQey8CNZ9gjYFzoHDmsR3iJlDGpipmsLPfuBnz/8ADzcO4IYBEHMy AOwiIpVNCqEiYyN+8MOGGcyR78KK/mip7Ev2VDbEcAiXOvN1HXaNL/o65 A==; X-CSE-ConnectionGUID: JoHGUEqwTRmW2M1c00aqNA== X-CSE-MsgGUID: RqYCCVbLRnelYRUA7Ourpg== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from unknown (HELO ces02_data.me-corp.lan) ([146.255.191.134]) by esa1.hc555-34.eu.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jan 2025 09:59:07 +0200 X-CSE-ConnectionGUID: FYYNcb5ZStmr7odO8qDWnA== X-CSE-MsgGUID: fvveeh8CSXCeDoQnmO8UqA== Received: from unknown (HELO epgd022.me-corp.lan) ([10.154.54.1]) by ces02_data.me-corp.lan with SMTP; 07 Jan 2025 09:59:04 +0200 Received: by epgd022.me-corp.lan (sSMTP sendmail emulation); Tue, 07 Jan 2025 09:59:05 +0200 From: Vladimir Kondratiev To: anup@brainfault.org Cc: aou@eecs.berkeley.edu, conor+dt@kernel.org, krzk+dt@kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, palmer@dabbelt.com, paul.walmsley@sifive.com, robh@kernel.org, tglx@linutronix.de, vladimir.kondratiev@mobileye.com Subject: [PATCH v3 2/2] irqchip/riscv-aplic: add support for hart indexes Date: Tue, 7 Jan 2025 09:58:35 +0200 Message-ID: <20250107075835.1421602-3-vladimir.kondratiev@mobileye.com> In-Reply-To: <20250107075835.1421602-1-vladimir.kondratiev@mobileye.com> References: <20250107075835.1421602-1-vladimir.kondratiev@mobileye.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250106_235915_730975_A06E9FA4 X-CRM114-Status: GOOD ( 18.81 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Risc-V APLIC specification defines "hart index" in [1]: Within a given interrupt domain, each of the domain’s harts has a unique index number in the range 0 to 2^14 − 1 (= 16,383). The index number a domain associates with a hart may or may not have any relationship to the unique hart identifier (“hart ID”) that the RISC-V Privileged Architecture assigns to the hart. Two different interrupt domains may employ entirely different index numbers for the same set of harts. Further, this document says in "4.5 Memory-mapped control region for an interrupt domain": The array of IDC structures may include some for potential hart index numbers that are not actual hart index numbers in the domain. For example, the first IDC structure is always for hart index 0, but 0 is not necessarily a valid index number for any hart in the domain. Support arbitrary hart indexes specified in optional APLIC property "riscv,hart-indexes" that should be array of u32 elements, one per interrupt target. If this property not specified, fallback is to use logical hart indexes within the domain. [1]: https://github.com/riscv/riscv-aia Signed-off-by: Vladimir Kondratiev Reviewed-by: Anup Patel --- drivers/irqchip/irq-riscv-aplic-direct.c | 25 +++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-riscv-aplic-direct.c b/drivers/irqchip/irq-riscv-aplic-direct.c index 7cd6b646774b..ea61329decb2 100644 --- a/drivers/irqchip/irq-riscv-aplic-direct.c +++ b/drivers/irqchip/irq-riscv-aplic-direct.c @@ -31,7 +31,7 @@ struct aplic_direct { }; struct aplic_idc { - unsigned int hart_index; + u32 hart_index; void __iomem *regs; struct aplic_direct *direct; }; @@ -219,6 +219,21 @@ static int aplic_direct_parse_parent_hwirq(struct device *dev, u32 index, return 0; } +static int aplic_direct_get_hart_index(struct device *dev, u32 logical_index, + u32 *hart_index) +{ + static const char *prop_hart_index = "riscv,hart-indexes"; + struct device_node *np = to_of_node(dev->fwnode); + + if (!np || !of_property_present(np, prop_hart_index)) { + *hart_index = logical_index; + return 0; + } + + return of_property_read_u32_index(np, prop_hart_index, + logical_index, hart_index); +} + int aplic_direct_setup(struct device *dev, void __iomem *regs) { int i, j, rc, cpu, current_cpu, setup_count = 0; @@ -265,8 +280,12 @@ int aplic_direct_setup(struct device *dev, void __iomem *regs) cpumask_set_cpu(cpu, &direct->lmask); idc = per_cpu_ptr(&aplic_idcs, cpu); - idc->hart_index = i; - idc->regs = priv->regs + APLIC_IDC_BASE + i * APLIC_IDC_SIZE; + rc = aplic_direct_get_hart_index(dev, i, &idc->hart_index); + if (rc) { + dev_warn(dev, "hart index not found for IDC%d\n", i); + continue; + } + idc->regs = priv->regs + APLIC_IDC_BASE + idc->hart_index * APLIC_IDC_SIZE; idc->direct = direct; aplic_idc_set_delivery(idc, true);