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Tue, 14 Jan 2025 14:58:53 -0800 (PST) Received: from atishp.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-21a9f10df7asm71746105ad.47.2025.01.14.14.58.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Jan 2025 14:58:53 -0800 (PST) From: Atish Patra Date: Tue, 14 Jan 2025 14:57:45 -0800 Subject: [PATCH v2 20/21] tools/perf: Pass the Counter constraint values in the pmu events MIME-Version: 1.0 Message-Id: <20250114-counter_delegation-v2-20-8ba74cdb851b@rivosinc.com> References: <20250114-counter_delegation-v2-0-8ba74cdb851b@rivosinc.com> In-Reply-To: <20250114-counter_delegation-v2-0-8ba74cdb851b@rivosinc.com> To: Paul Walmsley , Palmer Dabbelt , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Anup Patel , Atish Patra , Will Deacon , Mark Rutland , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , weilin.wang@intel.com Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Palmer Dabbelt , Conor Dooley , devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, Atish Patra X-Mailer: b4 0.15-dev-13183 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250114_145854_146917_E31AFEC0 X-CRM114-Status: GOOD ( 12.18 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org RISC-V doesn't have any standard event to counter mapping discovery mechanism in the ISA. The ISA defines 29 programmable counters and platforms can choose to implement any number of them and map any events to any counters. Thus, the perf tool need to inform the driver about the counter mapping of each events. The current perf infrastructure only parses the 'Counter' constraints in metrics. This patch extends that to pass in the pmu events so that any driver can retrieve those values via perf attributes if defined accordingly. Signed-off-by: Atish Patra --- tools/perf/pmu-events/jevents.py | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-events/jevents.py index 28acd598dd7c..c21945238469 100755 --- a/tools/perf/pmu-events/jevents.py +++ b/tools/perf/pmu-events/jevents.py @@ -274,6 +274,11 @@ class JsonEvent: return fixed[name.lower()] return event + def counter_list_to_bitmask(counterlist): + counter_ids = list(map(int, counterlist.split(','))) + bitmask = sum(1 << pos for pos in counter_ids) + return bitmask + def unit_to_pmu(unit: str) -> Optional[str]: """Convert a JSON Unit to Linux PMU name.""" if not unit or unit == "core": @@ -427,6 +432,10 @@ class JsonEvent: else: raise argparse.ArgumentTypeError('Cannot find arch std event:', arch_std) + if self.counters['list']: + bitmask = counter_list_to_bitmask(self.counters['list']) + event += f',counterid_mask={bitmask:#x}' + self.event = real_event(self.name, event) def __repr__(self) -> str: