| Message ID | 20250127-counter_delegation-v3-10-64894d7e16d5@rivosinc.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add Counter delegation ISA extension support | expand |
| Context | Check | Description |
|---|---|---|
| bjorn/pre-ci_am | success | Success |
| bjorn/build-rv32-defconfig | success | build-rv32-defconfig |
| bjorn/build-rv64-clang-allmodconfig | success | build-rv64-clang-allmodconfig |
| bjorn/build-rv64-gcc-allmodconfig | success | build-rv64-gcc-allmodconfig |
| bjorn/build-rv64-nommu-k210-defconfig | success | build-rv64-nommu-k210-defconfig |
| bjorn/build-rv64-nommu-k210-virt | success | build-rv64-nommu-k210-virt |
| bjorn/checkpatch | success | checkpatch |
| bjorn/dtb-warn-rv64 | success | dtb-warn-rv64 |
| bjorn/header-inline | success | header-inline |
| bjorn/kdoc | success | kdoc |
| bjorn/module-param | success | module-param |
| bjorn/verify-fixes | success | verify-fixes |
| bjorn/verify-signedoff | success | verify-signedoff |
On Mon, Jan 27, 2025 at 08:59:51PM -0800, Atish Patra wrote: > Add the description for Smcntrpmf ISA extension > > Signed-off-by: Atish Patra <atishp@rivosinc.com> > --- > Documentation/devicetree/bindings/riscv/extensions.yaml | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml > index 1706a77729db..0afe47259c55 100644 > --- a/Documentation/devicetree/bindings/riscv/extensions.yaml > +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml > @@ -136,6 +136,14 @@ properties: > 20240213 version of the privileged ISA specification. This extension > depends on Sscsrind, Zihpm, Zicntr extensions. > > + - const: smcntrpmf > + description: | > + The standard Smcntrpmf supervisor-level extension for the machine mode > + to enable privilege mode filtering for cycle and instret counters as > + ratified in the 20240326 version of the privileged ISA specification. > + The Ssccfg extension depends on this as *cfg CSRs are available only > + if smcntrpmf is present. Same here, this Ssccfg dep on Smcntrpmf should be in schema. > + > - const: smmpm > description: | > The standard Smmpm extension for M-mode pointer masking as > > -- > 2.34.1 >
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index 1706a77729db..0afe47259c55 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -136,6 +136,14 @@ properties: 20240213 version of the privileged ISA specification. This extension depends on Sscsrind, Zihpm, Zicntr extensions. + - const: smcntrpmf + description: | + The standard Smcntrpmf supervisor-level extension for the machine mode + to enable privilege mode filtering for cycle and instret counters as + ratified in the 20240326 version of the privileged ISA specification. + The Ssccfg extension depends on this as *cfg CSRs are available only + if smcntrpmf is present. + - const: smmpm description: | The standard Smmpm extension for M-mode pointer masking as
Add the description for Smcntrpmf ISA extension Signed-off-by: Atish Patra <atishp@rivosinc.com> --- Documentation/devicetree/bindings/riscv/extensions.yaml | 8 ++++++++ 1 file changed, 8 insertions(+)