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[v3,08/21] dt-bindings: riscv: add Counter delegation ISA extensions description

Message ID 20250127-counter_delegation-v3-8-64894d7e16d5@rivosinc.com (mailing list archive)
State New
Headers show
Series Add Counter delegation ISA extension support | expand

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Commit Message

Atish Kumar Patra Jan. 28, 2025, 4:59 a.m. UTC 
Add description for the Smcdeleg/Ssccfg extension.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
 Documentation/devicetree/bindings/riscv/extensions.yaml | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

Comments

Conor Dooley Jan. 28, 2025, 6:13 p.m. UTC | #1 
On Mon, Jan 27, 2025 at 08:59:49PM -0800, Atish Patra wrote:
> Add description for the Smcdeleg/Ssccfg extension.
> 
> Signed-off-by: Atish Patra <atishp@rivosinc.com>

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Conor Dooley Jan. 28, 2025, 6:15 p.m. UTC | #2 
On Tue, Jan 28, 2025 at 06:13:30PM +0000, Conor Dooley wrote:
> On Mon, Jan 27, 2025 at 08:59:49PM -0800, Atish Patra wrote:
> > Add description for the Smcdeleg/Ssccfg extension.
> > 
> > Signed-off-by: Atish Patra <atishp@rivosinc.com>
> 
> Acked-by: Conor Dooley <conor.dooley@microchip.com>

Actually no, I take this back. Don't describe dependencies in text,
there's examples at the end of the file for how to set up dependencies
between extensions in schema. If you get stuck, lmk and I'll help.
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index f47d829545db..1706a77729db 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -128,6 +128,14 @@  properties:
             changes to interrupts as frozen at commit ccbddab ("Merge pull
             request #42 from riscv/jhauser-2023-RC4") of riscv-aia.
 
+        - const: smcdeleg
+          description: |
+            The standard Smcdeleg supervisor-level extension for the machine mode
+            to delegate the hpmcounters to supvervisor mode so that they are
+            directlyi accessible in the supervisor mode as ratified in the
+            20240213 version of the privileged ISA specification. This extension
+            depends on Sscsrind, Zihpm, Zicntr extensions.
+
         - const: smmpm
           description: |
             The standard Smmpm extension for M-mode pointer masking as
@@ -169,6 +177,14 @@  properties:
             behavioural changes to interrupts as frozen at commit ccbddab
             ("Merge pull request #42 from riscv/jhauser-2023-RC4") of riscv-aia.
 
+        - const: ssccfg
+          description: |
+            The standard Ssccfg supervisor-level extension for configuring
+            the delegated hpmcounters to be accessible directly in supervisor
+            mode as ratified in the 20240213 version of the privileged ISA
+            specification. This extension depends on Sscsrind, Smcdeleg, Zihpm,
+            Zicntr extensions.
+
         - const: sscofpmf
           description: |
             The standard Sscofpmf supervisor-level extension for count overflow