Message ID | 20250129091637.1667279-2-vladimir.kondratiev@mobileye.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | riscv,aplic: support for hart indexes | expand |
Context | Check | Description |
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bjorn/pre-ci_am | success | Success |
bjorn/build-rv32-defconfig | success | build-rv32-defconfig |
bjorn/build-rv64-clang-allmodconfig | success | build-rv64-clang-allmodconfig |
bjorn/build-rv64-gcc-allmodconfig | success | build-rv64-gcc-allmodconfig |
bjorn/build-rv64-nommu-k210-defconfig | success | build-rv64-nommu-k210-defconfig |
bjorn/build-rv64-nommu-k210-virt | success | build-rv64-nommu-k210-virt |
bjorn/checkpatch | success | checkpatch |
bjorn/dtb-warn-rv64 | success | dtb-warn-rv64 |
bjorn/header-inline | success | header-inline |
bjorn/kdoc | success | kdoc |
bjorn/module-param | success | module-param |
bjorn/verify-fixes | success | verify-fixes |
bjorn/verify-signedoff | success | verify-signedoff |
On Wed, 29 Jan 2025 11:16:36 +0200, Vladimir Kondratiev wrote: > Document optional property "riscv,hart-indexes" > > Risc-V APLIC specification defines "hart index" in [1]: > > Within a given interrupt domain, each of the domain’s harts has a > unique index number in the range 0 to 2^14 − 1 (= 16,383). The index > number a domain associates with a hart may or may not have any > relationship to the unique hart identifier (“hart ID”) that the > RISC-V Privileged Architecture assigns to the hart. Two different > interrupt domains may employ entirely different index numbers for > the same set of harts. > > Further, this document says in "4.5 Memory-mapped control > region for an interrupt domain": > > The array of IDC structures may include some for potential hart index > numbers that are not actual hart index numbers in the domain. For > example, the first IDC structure is always for hart index 0, but 0 is > not necessarily a valid index number for any hart in the domain. > > Support arbitrary hart indexes specified in optional APLIC property > "riscv,hart-indexes" that should be array of u32 elements, one per > interrupt target. If this property not specified, fallback is to use > logical hart indexes within the domain. > > [1]: https://github.com/riscv/riscv-aia > > Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com> > Reviewed-by: Anup Patel <anup@brainfault.org> > --- > .../bindings/interrupt-controller/riscv,aplic.yaml | 8 ++++++++ > 1 file changed, 8 insertions(+) > Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml b/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml index 190a6499c932..bef00521d5da 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml @@ -91,6 +91,14 @@ properties: Firmware must configure interrupt delegation registers based on interrupt delegation list. + riscv,hart-indexes: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 16384 + description: + A list of hart indexes that APLIC should use to address each hart + that is mentioned in the "interrupts-extended" + dependencies: riscv,delegation: [ "riscv,children" ]