From patchwork Wed Jan 29 09:16:37 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Vladimir Kondratiev X-Patchwork-Id: 13953543 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 47EA6C0218D for ; Wed, 29 Jan 2025 09:17:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=McJKrUvstpRu/G/ewGkaH8M7XV+biZZmhZqLfyyOPnU=; b=WHDX4+ddZBGaah qW5vuYdFBc7E4/VaqFwhDyAzaaNzCVD3eEuDVzTmACbM6zZoSCIFWZphKRbUHqb9YPExUYS3/NjGr ThA/9KWpjpeKJa1CyG2YdndHTSUjFBlAeNlTcixlxIY1uTdPSbTUak+DsMi/ugnVRVyvUOByzQMcc IFjPMAs3GELWRnkOtURo3oWH0TXOU+NEyoPcIha8RFJfYE1N65Hfg1DrAFKwKspQ649A8iR1M4Ewp tyV2rVZ5lMejPtE4x8bg0DSCXBhlMvjS9HzZPQOdh3/iYF0mqTRSrHj1mGv3yOmws2gbGe5eYdztz tnO0z8AMR3ZsVtfpvKvQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1td4Bw-00000006d5O-0PT2; Wed, 29 Jan 2025 09:17:00 +0000 Received: from esa2.hc555-34.eu.iphmx.com ([23.90.104.147]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1td4Bn-00000006d2M-3gN3 for linux-riscv@lists.infradead.org; Wed, 29 Jan 2025 09:16:53 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=mobileye.com; i=@mobileye.com; q=dns/txt; s=MoEyIP; t=1738142212; x=1769678212; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=t4I+3GYTBD9R29FxQzIKQ/m13Ut3AEhZho/gtBtVzk8=; b=a50D9kc9QDB2jifHyCBxAfZkT6NkkLtM66L7TGd1stIuWhKABcc2ol5+ f4sI8BTStypICDDJPK+WV6xBCMOz5o6Atw8W8XibV1JAr8IuU74u9knpp qFGSz1kZhemCB2zRfoAgbQye7s9nJzGypd3nD3kTfLKP9Q5J64zi8E6WH H83PQMEpggoJwU4bLYjwkyIMBdC8U1a+JMjQ+nBe18MBFTFTf3tTg51mR qztcQkd/1XWEXMy9a/JK4H7Uyho/VG88092Bp4rLCrUhU79+oPCP+c1wE BmuXjBOFNgdtZ2Dk/B/v4XPhOTRjW6/j1MwBufgNhGFXbvszmE0pdv5DA A==; X-CSE-ConnectionGUID: F/TJ/PaSQWqvYqiJbRYzOg== X-CSE-MsgGUID: SKum6Q1bSrSctiuJ8TojNw== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from unknown (HELO ces03_data.me-corp.lan) ([146.255.191.134]) by esa2.hc555-34.eu.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jan 2025 11:16:44 +0200 X-CSE-ConnectionGUID: nONMQM6cRruRabxuYX8Nfw== X-CSE-MsgGUID: vXRUQUsaTx62JrFTD94w6A== Received: from unknown (HELO epgd022.me-corp.lan) ([10.154.54.1]) by ces03_data.me-corp.lan with SMTP; 29 Jan 2025 11:16:41 +0200 Received: by epgd022.me-corp.lan (sSMTP sendmail emulation); Wed, 29 Jan 2025 11:16:43 +0200 From: Vladimir Kondratiev To: Anup Patel , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Vladimir Kondratiev Subject: [PATCH v5 2/2] irqchip/riscv-aplic: add support for hart indexes Date: Wed, 29 Jan 2025 11:16:37 +0200 Message-ID: <20250129091637.1667279-3-vladimir.kondratiev@mobileye.com> In-Reply-To: <20250129091637.1667279-1-vladimir.kondratiev@mobileye.com> References: <87ed0o87qg.ffs@tglx> <20250129091637.1667279-1-vladimir.kondratiev@mobileye.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250129_011652_224629_8C1CECC2 X-CRM114-Status: GOOD ( 19.56 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Risc-V APLIC specification defines "hart index" in [1]: Within a given interrupt domain, each of the domain’s harts has a unique index number in the range 0 to 2^14 − 1 (= 16,383). The index number a domain associates with a hart may or may not have any relationship to the unique hart identifier (“hart ID”) that the RISC-V Privileged Architecture assigns to the hart. Two different interrupt domains may employ entirely different index numbers for the same set of harts. Further, this document says in "4.5 Memory-mapped control region for an interrupt domain": The array of IDC structures may include some for potential hart index numbers that are not actual hart index numbers in the domain. For example, the first IDC structure is always for hart index 0, but 0 is not necessarily a valid index number for any hart in the domain. Support arbitrary hart indexes specified in optional APLIC property "riscv,hart-indexes" that should be array of u32 elements, one per interrupt target. If this property not specified, fallback is to use logical hart indexes within the domain. [1]: https://github.com/riscv/riscv-aia Signed-off-by: Vladimir Kondratiev Reviewed-by: Anup Patel --- drivers/irqchip/irq-riscv-aplic-direct.c | 25 +++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-riscv-aplic-direct.c b/drivers/irqchip/irq-riscv-aplic-direct.c index 7cd6b646774b..ea61329decb2 100644 --- a/drivers/irqchip/irq-riscv-aplic-direct.c +++ b/drivers/irqchip/irq-riscv-aplic-direct.c @@ -31,7 +31,7 @@ struct aplic_direct { }; struct aplic_idc { - unsigned int hart_index; + u32 hart_index; void __iomem *regs; struct aplic_direct *direct; }; @@ -219,6 +219,21 @@ static int aplic_direct_parse_parent_hwirq(struct device *dev, u32 index, return 0; } +static int aplic_direct_get_hart_index(struct device *dev, u32 logical_index, + u32 *hart_index) +{ + static const char *prop_hart_index = "riscv,hart-indexes"; + struct device_node *np = to_of_node(dev->fwnode); + + if (!np || !of_property_present(np, prop_hart_index)) { + *hart_index = logical_index; + return 0; + } + + return of_property_read_u32_index(np, prop_hart_index, + logical_index, hart_index); +} + int aplic_direct_setup(struct device *dev, void __iomem *regs) { int i, j, rc, cpu, current_cpu, setup_count = 0; @@ -265,8 +280,12 @@ int aplic_direct_setup(struct device *dev, void __iomem *regs) cpumask_set_cpu(cpu, &direct->lmask); idc = per_cpu_ptr(&aplic_idcs, cpu); - idc->hart_index = i; - idc->regs = priv->regs + APLIC_IDC_BASE + i * APLIC_IDC_SIZE; + rc = aplic_direct_get_hart_index(dev, i, &idc->hart_index); + if (rc) { + dev_warn(dev, "hart index not found for IDC%d\n", i); + continue; + } + idc->regs = priv->regs + APLIC_IDC_BASE + idc->hart_index * APLIC_IDC_SIZE; idc->direct = direct; aplic_idc_set_delivery(idc, true);