| Message ID | 20250227072721.5889-1-tingbo.liao@starfivetech.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Fix the __riscv_copy_vec_words_unaligned implementation | expand |
| Context | Check | Description |
|---|---|---|
| bjorn/pre-ci_am | success | Success |
| bjorn/build-rv32-defconfig | success | build-rv32-defconfig |
| bjorn/build-rv64-clang-allmodconfig | success | build-rv64-clang-allmodconfig |
| bjorn/build-rv64-gcc-allmodconfig | success | build-rv64-gcc-allmodconfig |
| bjorn/build-rv64-nommu-k210-defconfig | success | build-rv64-nommu-k210-defconfig |
| bjorn/build-rv64-nommu-k210-virt | success | build-rv64-nommu-k210-virt |
| bjorn/checkpatch | success | checkpatch |
| bjorn/dtb-warn-rv64 | success | dtb-warn-rv64 |
| bjorn/header-inline | success | header-inline |
| bjorn/kdoc | success | kdoc |
| bjorn/module-param | success | module-param |
| bjorn/verify-fixes | success | verify-fixes |
| bjorn/verify-signedoff | success | verify-signedoff |
Hi Tingbo, On 27/02/2025 08:27, Tingbo Liao wrote: > Correct the VEC_S macro definition to fix the implementation > of vector words copy in the case of unalignment in RISC-V. > > Signed-off-by: Tingbo Liao <tingbo.liao@starfivetech.com> > --- > arch/riscv/kernel/vec-copy-unaligned.S | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/kernel/vec-copy-unaligned.S b/arch/riscv/kernel/vec-copy-unaligned.S > index d16f19f1b3b6..7ce4de6f6e69 100644 > --- a/arch/riscv/kernel/vec-copy-unaligned.S > +++ b/arch/riscv/kernel/vec-copy-unaligned.S > @@ -11,7 +11,7 @@ > > #define WORD_SEW CONCATENATE(e, WORD_EEW) > #define VEC_L CONCATENATE(vle, WORD_EEW).v > -#define VEC_S CONCATENATE(vle, WORD_EEW).v > +#define VEC_S CONCATENATE(vse, WORD_EEW).v > > /* void __riscv_copy_vec_words_unaligned(void *, const void *, size_t) */ > /* Performs a memcpy without aligning buffers, using word loads and stores. */ That's a good catch, thanks. However, your patch title should be prefixed with "riscv:" : "[PATCH] riscv: Fix the __riscv_copy_vec_words_unaligned implementation" And you miss the following Fixes tag: Fixes: e7c9d66e313b ("RISC-V: Report vector unaligned access speed hwprobe") And then you can add: Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com> Can you respin a v2 with all those modifications please? Thanks, Alex
diff --git a/arch/riscv/kernel/vec-copy-unaligned.S b/arch/riscv/kernel/vec-copy-unaligned.S index d16f19f1b3b6..7ce4de6f6e69 100644 --- a/arch/riscv/kernel/vec-copy-unaligned.S +++ b/arch/riscv/kernel/vec-copy-unaligned.S @@ -11,7 +11,7 @@ #define WORD_SEW CONCATENATE(e, WORD_EEW) #define VEC_L CONCATENATE(vle, WORD_EEW).v -#define VEC_S CONCATENATE(vle, WORD_EEW).v +#define VEC_S CONCATENATE(vse, WORD_EEW).v /* void __riscv_copy_vec_words_unaligned(void *, const void *, size_t) */ /* Performs a memcpy without aligning buffers, using word loads and stores. */
Correct the VEC_S macro definition to fix the implementation of vector words copy in the case of unalignment in RISC-V. Signed-off-by: Tingbo Liao <tingbo.liao@starfivetech.com> --- arch/riscv/kernel/vec-copy-unaligned.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)