| Message ID | 20250310151229.2365992-7-cleger@rivosinc.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | riscv: add SBI FWFT misaligned exception delegation support | expand |
| Context | Check | Description |
|---|---|---|
| bjorn/pre-ci_am | success | Success |
| bjorn/build-rv32-defconfig | success | build-rv32-defconfig |
| bjorn/build-rv64-clang-allmodconfig | success | build-rv64-clang-allmodconfig |
| bjorn/build-rv64-gcc-allmodconfig | success | build-rv64-gcc-allmodconfig |
| bjorn/build-rv64-nommu-k210-defconfig | success | build-rv64-nommu-k210-defconfig |
| bjorn/build-rv64-nommu-k210-virt | success | build-rv64-nommu-k210-virt |
| bjorn/checkpatch | success | checkpatch |
| bjorn/dtb-warn-rv64 | success | dtb-warn-rv64 |
| bjorn/header-inline | success | header-inline |
| bjorn/kdoc | success | kdoc |
| bjorn/module-param | success | module-param |
| bjorn/verify-fixes | success | verify-fixes |
| bjorn/verify-signedoff | success | verify-signedoff |
On Mon, Mar 10, 2025 at 04:12:13PM +0100, Clément Léger wrote: > misaligned_access_speed is defined under CONFIG_RISCV_SCALAR_MISALIGNED > but was used under CONFIG_RISCV_PROBE_UNALIGNED_ACCESS. Fix that by > using the correct config option. > > Signed-off-by: Clément Léger <cleger@rivosinc.com> > --- > arch/riscv/kernel/traps_misaligned.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c > index ffac424faa88..7fe25adf2539 100644 > --- a/arch/riscv/kernel/traps_misaligned.c > +++ b/arch/riscv/kernel/traps_misaligned.c > @@ -362,7 +362,7 @@ static int handle_scalar_misaligned_load(struct pt_regs *regs) > > perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, addr); > > -#ifdef CONFIG_RISCV_PROBE_UNALIGNED_ACCESS > +#ifdef CONFIG_RISCV_SCALAR_MISALIGNED > *this_cpu_ptr(&misaligned_access_speed) = RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED; > #endif Sure, but CONFIG_RISCV_PROBE_UNALIGNED_ACCESS selects CONFIG_RISCV_SCALAR_MISALIGNED, so this isn't fixing anything. Changing it does make sense though since this line in handle_scalar_misaligned_load() "belongs" to check_unaligned_access_emulated() which is also under CONFIG_RISCV_SCALAR_MISALIGNED. Anyway, all this unaligned configs need a major cleanup. Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Thanks, drew > > -- > 2.47.2 > > > -- > kvm-riscv mailing list > kvm-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/kvm-riscv
On 13/03/2025 14:06, Andrew Jones wrote: > On Mon, Mar 10, 2025 at 04:12:13PM +0100, Clément Léger wrote: >> misaligned_access_speed is defined under CONFIG_RISCV_SCALAR_MISALIGNED >> but was used under CONFIG_RISCV_PROBE_UNALIGNED_ACCESS. Fix that by >> using the correct config option. >> >> Signed-off-by: Clément Léger <cleger@rivosinc.com> >> --- >> arch/riscv/kernel/traps_misaligned.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c >> index ffac424faa88..7fe25adf2539 100644 >> --- a/arch/riscv/kernel/traps_misaligned.c >> +++ b/arch/riscv/kernel/traps_misaligned.c >> @@ -362,7 +362,7 @@ static int handle_scalar_misaligned_load(struct pt_regs *regs) >> >> perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, addr); >> >> -#ifdef CONFIG_RISCV_PROBE_UNALIGNED_ACCESS >> +#ifdef CONFIG_RISCV_SCALAR_MISALIGNED >> *this_cpu_ptr(&misaligned_access_speed) = RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED; >> #endif > > Sure, but CONFIG_RISCV_PROBE_UNALIGNED_ACCESS selects > CONFIG_RISCV_SCALAR_MISALIGNED, so this isn't fixing anything. Indeed, that is not fixing anything (hence no Fixes tag), it compiles as a side effect of Kconfig dependencies. > Changing it > does make sense though since this line in handle_scalar_misaligned_load() > "belongs" to check_unaligned_access_emulated() which is also under > CONFIG_RISCV_SCALAR_MISALIGNED. Anyway, all this unaligned configs need a > major cleanup. Yes, as I said, I'd be advocating to remove all that ifdefery mess. Thanks, Clément > > > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> > > Thanks, > drew > >> >> -- >> 2.47.2 >> >> >> -- >> kvm-riscv mailing list >> kvm-riscv@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/kvm-riscv
diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c index ffac424faa88..7fe25adf2539 100644 --- a/arch/riscv/kernel/traps_misaligned.c +++ b/arch/riscv/kernel/traps_misaligned.c @@ -362,7 +362,7 @@ static int handle_scalar_misaligned_load(struct pt_regs *regs) perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, addr); -#ifdef CONFIG_RISCV_PROBE_UNALIGNED_ACCESS +#ifdef CONFIG_RISCV_SCALAR_MISALIGNED *this_cpu_ptr(&misaligned_access_speed) = RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED; #endif
misaligned_access_speed is defined under CONFIG_RISCV_SCALAR_MISALIGNED but was used under CONFIG_RISCV_PROBE_UNALIGNED_ACCESS. Fix that by using the correct config option. Signed-off-by: Clément Léger <cleger@rivosinc.com> --- arch/riscv/kernel/traps_misaligned.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)