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[v5,07/10] dt-bindings: interrupt-controller: Add Sophgo sg2042 CLINT mswi

Message ID 4db57bcb69b9182c171598eb8d65151a347cfe8f.1696663037.git.unicorn_wang@outlook.com (mailing list archive)
State Accepted
Headers show
Series Add Milk-V Pioneer RISC-V board support | expand

Checks

Context Check Description
conchuod/vmtest-for-next-PR warning PR summary
conchuod/patch-7-test-1 success .github/scripts/patches/build_rv32_defconfig.sh
conchuod/patch-7-test-2 success .github/scripts/patches/build_rv64_clang_allmodconfig.sh
conchuod/patch-7-test-3 success .github/scripts/patches/build_rv64_gcc_allmodconfig.sh
conchuod/patch-7-test-4 success .github/scripts/patches/build_rv64_nommu_k210_defconfig.sh
conchuod/patch-7-test-5 success .github/scripts/patches/build_rv64_nommu_virt_defconfig.sh
conchuod/patch-7-test-6 warning .github/scripts/patches/checkpatch.sh
conchuod/patch-7-test-7 success .github/scripts/patches/dtb_warn_rv64.sh
conchuod/patch-7-test-8 success .github/scripts/patches/header_inline.sh
conchuod/patch-7-test-9 success .github/scripts/patches/kdoc.sh
conchuod/patch-7-test-10 success .github/scripts/patches/maintainers_patterns.sh
conchuod/patch-7-test-11 success .github/scripts/patches/module_param.sh
conchuod/patch-7-test-12 success .github/scripts/patches/verify_fixes.sh
conchuod/patch-7-test-13 success .github/scripts/patches/verify_signedoff.sh

Commit Message

Chen Wang Oct. 7, 2023, 7:56 a.m. UTC
From: Inochi Amaoto <inochiama@outlook.com>

The clint of Sophgo's sg2042 is based off IP designed by T-HEAD, and
implements the not yet frozen ACLINT spec. This spec seems to be
abandoned, and will not be frozen in the predictable future.
Frozen specs required by the RISC-V maintainers before merging content
relating to those extensions, therefore a generic compatible is not
appropriate.
Instead, add new vendor specific compatible strings to identify mswi of
sg2042 clint.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
[conor: re-wrote commit message to drop irrelevant sifive,clint discussion]
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 .../thead,c900-aclint-mswi.yaml               | 43 +++++++++++++++++++
 1 file changed, 43 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-mswi.yaml
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-mswi.yaml b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-mswi.yaml
new file mode 100644
index 000000000000..065f2544b63b
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-mswi.yaml
@@ -0,0 +1,43 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/thead,c900-aclint-mswi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sophgo sg2042 CLINT Machine-level Software Interrupt Device
+
+maintainers:
+  - Inochi Amaoto <inochiama@outlook.com>
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - sophgo,sg2042-aclint-mswi
+      - const: thead,c900-aclint-mswi
+
+  reg:
+    maxItems: 1
+
+  interrupts-extended:
+    minItems: 1
+    maxItems: 4095
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - interrupts-extended
+
+examples:
+  - |
+    interrupt-controller@94000000 {
+      compatible = "sophgo,sg2042-aclint-mswi", "thead,c900-aclint-mswi";
+      interrupts-extended = <&cpu1intc 3>,
+                            <&cpu2intc 3>,
+                            <&cpu3intc 3>,
+                            <&cpu4intc 3>;
+      reg = <0x94000000 0x00010000>;
+    };
+...