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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id b5sm3108466pfr.26.2021.09.08.10.46.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Sep 2021 10:46:05 -0700 (PDT) From: Greentime Hu To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, aou@eecs.berkeley.edu, palmer@dabbelt.com, paul.walmsley@sifive.com, vincent.chen@sifive.com Subject: [RFC PATCH v8 19/21] riscv: Allocate space for vector registers in start_thread() Date: Thu, 9 Sep 2021 01:45:31 +0800 Message-Id: <5d99eab37a683d21e0cec75bfcec96ad8b480d02.1631121222.git.greentime.hu@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210908_104606_643288_76F2C6F5 X-CRM114-Status: GOOD ( 13.76 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org It allocates memory space for vector registers in start_thread() instead of allocating in vstate_restore() in this patch. We can allocate memory here so that it will be more readable. Co-developed-by: Vincent Chen Signed-off-by: Vincent Chen Signed-off-by: Greentime Hu --- arch/riscv/include/asm/switch_to.h | 7 +------ arch/riscv/kernel/process.c | 15 +++++++++++++-- 2 files changed, 14 insertions(+), 8 deletions(-) diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h index de0573dad78f..b48c9c974564 100644 --- a/arch/riscv/include/asm/switch_to.h +++ b/arch/riscv/include/asm/switch_to.h @@ -103,12 +103,6 @@ static inline void vstate_restore(struct task_struct *task, { if ((regs->status & SR_VS) != SR_VS_OFF) { struct __riscv_v_state *vstate = &(task->thread.vstate); - - /* Allocate space for vector registers. */ - if (!vstate->datap) { - vstate->datap = kzalloc(riscv_vsize, GFP_ATOMIC); - vstate->size = riscv_vsize; - } __vstate_restore(vstate, vstate->datap); __vstate_clean(regs); } @@ -127,6 +121,7 @@ static inline void __switch_to_vector(struct task_struct *prev, #else #define has_vector false +#define riscv_vsize (0) #define vstate_save(task, regs) do { } while (0) #define vstate_restore(task, regs) do { } while (0) #define __switch_to_vector(__prev, __next) do { } while (0) diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index 0b86e9e531c9..05ff5f934e7e 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -97,7 +97,16 @@ void start_thread(struct pt_regs *regs, unsigned long pc, } if (has_vector) { + struct __riscv_v_state *vstate = &(current->thread.vstate); + + /* Enable vector and allocate memory for vector registers. */ + if (!vstate->datap) { + vstate->datap = kzalloc(riscv_vsize, GFP_KERNEL); + if (WARN_ON(!vstate->datap)) + return; + } regs->status |= SR_VS_INITIAL; + /* * Restore the initial value to the vector register * before starting the user program. @@ -121,9 +130,11 @@ void flush_thread(void) memset(¤t->thread.fstate, 0, sizeof(current->thread.fstate)); #endif #ifdef CONFIG_VECTOR - /* Reset vector state */ + /* Reset vector state and keep datap pointer. */ vstate_off(current, task_pt_regs(current)); - memset(¤t->thread.vstate, 0, sizeof(current->thread.vstate)); + memset(¤t->thread.vstate, 0, RISCV_V_STATE_DATAP); + if (current->thread.vstate.datap) + memset(current->thread.vstate.datap, 0, riscv_vsize); #endif }