From patchwork Tue Oct 3 10:47:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13407402 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 78A27E7544B for ; Tue, 3 Oct 2023 10:48:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=6zOEEWHdN+sDrv+V9swfij+GG8qVRfoBqwD/CZYcbYc=; b=vPnTFDyiTK8RCH QmxPKt3kaRJyMhn0kXWVf7VLSk9wdc6LYlsC1EnF06pQuIKpHzawVUh9t9YDG/rlfVoJSWZ53EFNO ytiKWO4TS6K2sRee2Ve8h8oeZSsmqSQkx+spj8VfI4eYlV2WHLUowIg0cuD5MXSb6/MNmCD9Kw9oU RZxCLrVhY+oRYwc8+DeU0DTuFl5m0+jwpIiOM1npbWj4RD8CWws1ksUji71FEi2tkO62FTXwIax2r MmLPQURj98GuUxC3KJ4SqRMW94lJ7I1kmFriyAgEBc1X8FOG8ZymtgCj98WooKP2tIQvb+1uQ921s wEDz1Owwc57te0PHYRkw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qncwp-00EOLy-1u; Tue, 03 Oct 2023 10:48:15 +0000 Received: from michel.telenet-ops.be ([2a02:1800:110:4::f00:18]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qncwl-00EOEw-2P for linux-riscv@lists.infradead.org; Tue, 03 Oct 2023 10:48:14 +0000 Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed40:5b9d:c703:a536:8d7b]) by michel.telenet-ops.be with bizsmtp id tNo02A00M0Gl2EY06No0kY; Tue, 03 Oct 2023 12:48:01 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtp (Exim 4.95) (envelope-from ) id 1qncwB-00587Y-Ax; Tue, 03 Oct 2023 12:48:00 +0200 Received: from geert by rox.of.borg with local (Exim 4.95) (envelope-from ) id 1qncwa-00FjVc-7T; Tue, 03 Oct 2023 12:48:00 +0200 From: Geert Uytterhoeven To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Palmer Dabbelt , Lad Prabhakar Cc: devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-riscv@lists.infradead.org, Geert Uytterhoeven Subject: [PATCH] dt-bindings: cache: andestech,ax45mp-cache: Fix unit address in example Date: Tue, 3 Oct 2023 12:47:59 +0200 Message-Id: <7b93655219a6ad696dd3faa9f36fde6b094694a9.1696330005.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231003_034811_940505_7136A964 X-CRM114-Status: UNSURE ( 9.84 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The unit address in the example does not match the reg property. Correct the unit address to match reality. Fixes: 3e7bf4685e42786d ("dt-bindings: cache: andestech,ax45mp-cache: Add DT binding documentation for L2 cache controller") Signed-off-by: Geert Uytterhoeven Reviewed-by: Krzysztof Kozlowski Reviewed-by: Lad Prabhakar --- .../devicetree/bindings/cache/andestech,ax45mp-cache.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml index 9ab5f0c435d4df16..d2cbe49f4e15fdc4 100644 --- a/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml +++ b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml @@ -69,7 +69,7 @@ examples: - | #include - cache-controller@2010000 { + cache-controller@13400000 { compatible = "andestech,ax45mp-cache", "cache"; reg = <0x13400000 0x100000>; interrupts = <508 IRQ_TYPE_LEVEL_HIGH>;