diff mbox series

[v4,7/7] riscv: dts: sophgo: cv1812h: add pinctrl support

Message ID IA1PR20MB495348B5FFE61FF1D76ECC4DBBB32@IA1PR20MB4953.namprd20.prod.outlook.com (mailing list archive)
State Superseded
Headers show
Series riscv: sophgo: Add pinctrl support for CV1800 series SoC | expand

Checks

Context Check Description
conchuod/vmtest-fixes-PR fail merge-conflict

Commit Message

Inochi Amaoto Aug. 2, 2024, 12:35 a.m. UTC
Add pinctrl node for CV1812H SoC.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
---
 arch/riscv/boot/dts/sophgo/cv1812h.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

--
2.46.0

Comments

Thomas Bonnefille Aug. 30, 2024, 1 p.m. UTC | #1
On 8/2/24 2:35 AM, Inochi Amaoto wrote:
> Add pinctrl node for CV1812H SoC.
>
> Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
> ---
>   arch/riscv/boot/dts/sophgo/cv1812h.dtsi | 10 ++++++++++
>   1 file changed, 10 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
> index 8fcb400574ed..2dfa450f0d26 100644
> --- a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
> @@ -4,6 +4,7 @@
>    */
>
>   #include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/pinctrl/pinctrl-cv1812h.h>
>   #include "cv18xx.dtsi"
>   #include "cv181x.dtsi"

Hello Inochi,
I'm trying to apply your patch to the LicheeRV Nano series but I can't 
find the file "cv181x.dtsi", neither in the upstream v6.11-rc5 nor in 
the additional required patch.
It was first mentioned in the v3 of your patch series.
Was it supposed to appear here ?

If so, can you help me figure out where to find it?

Regards,
Thomas

> @@ -14,6 +15,15 @@ memory@80000000 {
>   		device_type = "memory";
>   		reg = <0x80000000 0x10000000>;
>   	};
> +
> +	soc {
> +		pinctrl: pinctrl@3008000 {
> +			compatible = "sophgo,cv1812h-pinctrl";
> +			reg = <0x03001000 0x1000>,
> +			      <0x05027000 0x1000>;
> +			reg-names = "sys", "rtc";
> +		};
> +	};
>   };
>
>   &plic {
> --
> 2.46.0
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
Inochi Amaoto Aug. 30, 2024, 10:49 p.m. UTC | #2
On Fri, Aug 30, 2024 at 03:00:03PM GMT, Thomas Bonnefille wrote:
> On 8/2/24 2:35 AM, Inochi Amaoto wrote:
> > Add pinctrl node for CV1812H SoC.
> > 
> > Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
> > ---
> >   arch/riscv/boot/dts/sophgo/cv1812h.dtsi | 10 ++++++++++
> >   1 file changed, 10 insertions(+)
> > 
> > diff --git a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
> > index 8fcb400574ed..2dfa450f0d26 100644
> > --- a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
> > +++ b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
> > @@ -4,6 +4,7 @@
> >    */
> > 
> >   #include <dt-bindings/interrupt-controller/irq.h>
> > +#include <dt-bindings/pinctrl/pinctrl-cv1812h.h>
> >   #include "cv18xx.dtsi"
> >   #include "cv181x.dtsi"
> 
> Hello Inochi,
> I'm trying to apply your patch to the LicheeRV Nano series but I can't find
> the file "cv181x.dtsi", neither in the upstream v6.11-rc5 nor in the
> additional required patch.
> It was first mentioned in the v3 of your patch series.
> Was it supposed to appear here ?
> 
> If so, can you help me figure out where to find it?
> 

It seems that I have made a mistake. The cv181x.dtsi file comes 
from emmc node for cv181x (it is not upstreamed). 
I have send a new version to fix these dts file change [1], you
can try them. Moreover, using the commit from for-next tree is
also OK, I rebase the patch to the right one when applying these
patches.

https://lore.kernel.org/all/IA1PR20MB495374DB8C4208575AAC9675BB972@IA1PR20MB4953.namprd20.prod.outlook.com/

Regard,
Inochi
diff mbox series

Patch

diff --git a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
index 8fcb400574ed..2dfa450f0d26 100644
--- a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
@@ -4,6 +4,7 @@ 
  */

 #include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pinctrl/pinctrl-cv1812h.h>
 #include "cv18xx.dtsi"
 #include "cv181x.dtsi"

@@ -14,6 +15,15 @@  memory@80000000 {
 		device_type = "memory";
 		reg = <0x80000000 0x10000000>;
 	};
+
+	soc {
+		pinctrl: pinctrl@3008000 {
+			compatible = "sophgo,cv1812h-pinctrl";
+			reg = <0x03001000 0x1000>,
+			      <0x05027000 0x1000>;
+			reg-names = "sys", "rtc";
+		};
+	};
 };

 &plic {