diff mbox series

riscv: dts: thead: th1520: Add PMU event node

Message ID IA1PR20MB4953BA3638A0839FCB0EF86BBBF32@IA1PR20MB4953.namprd20.prod.outlook.com (mailing list archive)
State Accepted
Headers show
Series riscv: dts: thead: th1520: Add PMU event node | expand

Checks

Context Check Description
conchuod/vmtest-for-next-PR success PR summary
conchuod/patch-1-test-1 success .github/scripts/patches/tests/build_rv32_defconfig.sh
conchuod/patch-1-test-2 success .github/scripts/patches/tests/build_rv64_clang_allmodconfig.sh
conchuod/patch-1-test-3 success .github/scripts/patches/tests/build_rv64_gcc_allmodconfig.sh
conchuod/patch-1-test-4 success .github/scripts/patches/tests/build_rv64_nommu_k210_defconfig.sh
conchuod/patch-1-test-5 success .github/scripts/patches/tests/build_rv64_nommu_virt_defconfig.sh
conchuod/patch-1-test-6 success .github/scripts/patches/tests/checkpatch.sh
conchuod/patch-1-test-7 success .github/scripts/patches/tests/dtb_warn_rv64.sh
conchuod/patch-1-test-8 success .github/scripts/patches/tests/header_inline.sh
conchuod/patch-1-test-9 success .github/scripts/patches/tests/kdoc.sh
conchuod/patch-1-test-10 success .github/scripts/patches/tests/module_param.sh
conchuod/patch-1-test-11 success .github/scripts/patches/tests/verify_fixes.sh
conchuod/patch-1-test-12 success .github/scripts/patches/tests/verify_signedoff.sh

Commit Message

Inochi Amaoto May 30, 2024, 11:18 a.m. UTC 
T-HEAD th1520 uses standard C910 chip and its pmu is already supported
by OpenSBI.

Add the pmu event description for T-HEAD th1520 SoC.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://www.xrvm.com/product/xuantie/4240217381324001280?spm=xrvm.27140568.0.0.7f979b29nzIa1m
---
 arch/riscv/boot/dts/thead/th1520.dtsi | 81 +++++++++++++++++++++++++++
 1 file changed, 81 insertions(+)

--
2.45.1

Comments

Guo Ren May 31, 2024, 1:43 a.m. UTC | #1 
On Thu, May 30, 2024 at 7:19 PM Inochi Amaoto <inochiama@outlook.com> wrote:
>
> T-HEAD th1520 uses standard C910 chip and its pmu is already supported
> by OpenSBI.
>
> Add the pmu event description for T-HEAD th1520 SoC.
>
> Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
> Link: https://www.xrvm.com/product/xuantie/4240217381324001280?spm=xrvm.27140568.0.0.7f979b29nzIa1m
> ---
>  arch/riscv/boot/dts/thead/th1520.dtsi | 81 +++++++++++++++++++++++++++
>  1 file changed, 81 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
> index d2fa25839012..3c9974062c20 100644
> --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> @@ -122,6 +122,87 @@ l2_cache: l2-cache {
>                 };
>         };
>
> +       pmu {
> +               compatible = "riscv,pmu";
> +               riscv,event-to-mhpmcounters =
> +                       <0x00003 0x00003 0x0007fff8>,
> +                       <0x00004 0x00004 0x0007fff8>,
> +                       <0x00005 0x00005 0x0007fff8>,
> +                       <0x00006 0x00006 0x0007fff8>,
> +                       <0x00007 0x00007 0x0007fff8>,
> +                       <0x00008 0x00008 0x0007fff8>,
> +                       <0x00009 0x00009 0x0007fff8>,
> +                       <0x0000a 0x0000a 0x0007fff8>,
> +                       <0x10000 0x10000 0x0007fff8>,
> +                       <0x10001 0x10001 0x0007fff8>,
> +                       <0x10002 0x10002 0x0007fff8>,
> +                       <0x10003 0x10003 0x0007fff8>,
> +                       <0x10010 0x10010 0x0007fff8>,
> +                       <0x10011 0x10011 0x0007fff8>,
> +                       <0x10012 0x10012 0x0007fff8>,
> +                       <0x10013 0x10013 0x0007fff8>;
> +               riscv,event-to-mhpmevent =
> +                       <0x00003 0x00000000 0x00000001>,
> +                       <0x00004 0x00000000 0x00000002>,
> +                       <0x00006 0x00000000 0x00000006>,
> +                       <0x00005 0x00000000 0x00000007>,
> +                       <0x00007 0x00000000 0x00000008>,
> +                       <0x00008 0x00000000 0x00000009>,
> +                       <0x00009 0x00000000 0x0000000a>,
> +                       <0x0000a 0x00000000 0x0000000b>,
> +                       <0x10000 0x00000000 0x0000000c>,
> +                       <0x10001 0x00000000 0x0000000d>,
> +                       <0x10002 0x00000000 0x0000000e>,
> +                       <0x10003 0x00000000 0x0000000f>,
> +                       <0x10010 0x00000000 0x00000010>,
> +                       <0x10011 0x00000000 0x00000011>,
> +                       <0x10012 0x00000000 0x00000012>,
> +                       <0x10013 0x00000000 0x00000013>;
> +               riscv,raw-event-to-mhpmcounters =
> +                       <0x00000000 0x00000001 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000002 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000003 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000004 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000005 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000006 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000007 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000008 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000009 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x0000000a 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x0000000b 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x0000000c 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x0000000d 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x0000000e 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x0000000f 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000010 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000011 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000012 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000013 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000014 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000015 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000016 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000017 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000018 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000019 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x0000001a 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x0000001b 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x0000001c 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x0000001d 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x0000001e 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x0000001f 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000020 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000021 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000022 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000023 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000024 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000025 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000026 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000027 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000028 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x00000029 0xffffffff 0xffffffff 0x0007fff8>,
> +                       <0x00000000 0x0000002a 0xffffffff 0xffffffff 0x0007fff8>;
> +       };
> +
>         osc: oscillator {
>                 compatible = "fixed-clock";
>                 clock-output-names = "osc_24m";
> --
> 2.45.1
>
LGTM! Reviewed-by: Guo Ren <guoren@kernel.org>
Conor Dooley May 31, 2024, 11:35 a.m. UTC | #2 
On 30/05/2024 12:18, Inochi Amaoto wrote:
> T-HEAD th1520 uses standard C910 chip and its pmu is already supported
> by OpenSBI.
> 
> Add the pmu event description for T-HEAD th1520 SoC.
> 
> Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
> Link: https://www.xrvm.com/product/xuantie/4240217381324001280?spm=xrvm.27140568.0.0.7f979b29nzIa1m

Applied, thanks.
Conor Dooley May 31, 2024, 3:03 p.m. UTC | #3 
On Fri, May 31, 2024 at 09:43:00AM +0800, Guo Ren wrote:
> LGTM! Reviewed-by: Guo Ren <guoren@kernel.org>

Please provide tags on a new line so that tooling picks them up.
I had to amend this commit cos I forgot a signoff, so I added it.

Thanks,
Conor.
Guo Ren June 1, 2024, 3:07 a.m. UTC | #4 
On Fri, May 31, 2024 at 11:03 PM Conor Dooley <conor@kernel.org> wrote:
>
> On Fri, May 31, 2024 at 09:43:00AM +0800, Guo Ren wrote:
> > LGTM! Reviewed-by: Guo Ren <guoren@kernel.org>
>
> Please provide tags on a new line so that tooling picks them up.
> I had to amend this commit cos I forgot a signoff, so I added it.
Okay, Thx for telling.

>
> Thanks,
> Conor.
diff mbox series

Patch

diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index d2fa25839012..3c9974062c20 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -122,6 +122,87 @@  l2_cache: l2-cache {
 		};
 	};

+	pmu {
+		compatible = "riscv,pmu";
+		riscv,event-to-mhpmcounters =
+			<0x00003 0x00003 0x0007fff8>,
+			<0x00004 0x00004 0x0007fff8>,
+			<0x00005 0x00005 0x0007fff8>,
+			<0x00006 0x00006 0x0007fff8>,
+			<0x00007 0x00007 0x0007fff8>,
+			<0x00008 0x00008 0x0007fff8>,
+			<0x00009 0x00009 0x0007fff8>,
+			<0x0000a 0x0000a 0x0007fff8>,
+			<0x10000 0x10000 0x0007fff8>,
+			<0x10001 0x10001 0x0007fff8>,
+			<0x10002 0x10002 0x0007fff8>,
+			<0x10003 0x10003 0x0007fff8>,
+			<0x10010 0x10010 0x0007fff8>,
+			<0x10011 0x10011 0x0007fff8>,
+			<0x10012 0x10012 0x0007fff8>,
+			<0x10013 0x10013 0x0007fff8>;
+		riscv,event-to-mhpmevent =
+			<0x00003 0x00000000 0x00000001>,
+			<0x00004 0x00000000 0x00000002>,
+			<0x00006 0x00000000 0x00000006>,
+			<0x00005 0x00000000 0x00000007>,
+			<0x00007 0x00000000 0x00000008>,
+			<0x00008 0x00000000 0x00000009>,
+			<0x00009 0x00000000 0x0000000a>,
+			<0x0000a 0x00000000 0x0000000b>,
+			<0x10000 0x00000000 0x0000000c>,
+			<0x10001 0x00000000 0x0000000d>,
+			<0x10002 0x00000000 0x0000000e>,
+			<0x10003 0x00000000 0x0000000f>,
+			<0x10010 0x00000000 0x00000010>,
+			<0x10011 0x00000000 0x00000011>,
+			<0x10012 0x00000000 0x00000012>,
+			<0x10013 0x00000000 0x00000013>;
+		riscv,raw-event-to-mhpmcounters =
+			<0x00000000 0x00000001 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000002 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000003 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000004 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000005 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000006 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000007 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000008 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000009 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x0000000a 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x0000000b 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x0000000c 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x0000000d 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x0000000e 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x0000000f 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000010 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000011 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000012 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000013 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000014 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000015 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000016 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000017 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000018 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000019 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x0000001a 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x0000001b 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x0000001c 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x0000001d 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x0000001e 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x0000001f 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000020 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000021 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000022 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000023 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000024 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000025 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000026 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000027 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000028 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x00000029 0xffffffff 0xffffffff 0x0007fff8>,
+			<0x00000000 0x0000002a 0xffffffff 0xffffffff 0x0007fff8>;
+	};
+
 	osc: oscillator {
 		compatible = "fixed-clock";
 		clock-output-names = "osc_24m";