| Message ID | IA1PR20MB4953BD73E12B8A1CDBD9E1A3BB042@IA1PR20MB4953.namprd20.prod.outlook.com (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | riscv: dts: sophgo: cv18xx: add DMA controller | expand |
On Fri, 12 Apr 2024 16:33:32 +0800, Inochi Amaoto wrote: > Add DMA controller dt node for CV18XX/SG200x. > > Applied to sophgo/for-next, thanks! [1/1] riscv: dts: sophgo: cv18xx: add DMA controller https://github.com/sophgo/linux/commit/e0b2125b9dcf0c7efcee887c9fef93c45b6705e1 Thanks, Inochi
diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi index b726871e6af8..7d96c4ddc1e6 100644 --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi @@ -195,6 +195,22 @@ uart4: serial@41c0000 { status = "disabled"; }; + dmac: dma-controller@4330000 { + compatible = "snps,axi-dma-1.01a"; + reg = <0x04330000 0x1000>; + interrupts = <29 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk CLK_SDMA_AXI>, <&clk CLK_SDMA_AXI>; + clock-names = "core-clk", "cfgr-clk"; + #dma-cells = <1>; + dma-channels = <8>; + snps,block-size = <1024 1024 1024 1024 + 1024 1024 1024 1024>; + snps,priority = <0 1 2 3 4 5 6 7>; + snps,dma-masters = <2>; + snps,data-width = <4>; + status = "disabled"; + }; + plic: interrupt-controller@70000000 { reg = <0x70000000 0x4000000>; interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>;
Add DMA controller dt node for CV18XX/SG200x. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> --- arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) -- 2.44.0