From patchwork Wed Sep 8 17:45:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greentime Hu X-Patchwork-Id: 12481601 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2D192C433F5 for ; Wed, 8 Sep 2021 17:46:28 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EF0D461131 for ; Wed, 8 Sep 2021 17:46:27 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org EF0D461131 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=sifive.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=khyl9/4Ws+4NK1RE843ocxe1SxJUo7eAYtkghWPpP6o=; b=pmLOQYV+dqs4YV GI9Zw1by9WxN/mXTyOPxpbWD1baHjrjkL3gprnDBHvxpOhbnfeQ2CiJiwdfvABJKWUADS1h6/qU4j 7qwMFXIOc7R7niKuIPTO842tCcwaxV7T1lcTlgRox6UcUUjZC4GgnDTcx3BCp+uAkAg6vbuvieMHj 1Hww/oQcS+SfvRQ3snVZ+4NHA8dmJzLv46QPN8OadEZaI6IjF7rdNQgYbwwI05fYvYe9VRjN7gOrQ 0EXEXDswDHOp/uMV+io92xznktXFIngjyMRRTiCRgYZs8nsxToQZONWq0liEWIcgxjQUfiAvdN6OG kbb4v+f3189ZVvatBqBw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mO1eM-007IqC-37; Wed, 08 Sep 2021 17:46:18 +0000 Received: from mail-pl1-x62e.google.com ([2607:f8b0:4864:20::62e]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mO1dz-007IVo-BA for linux-riscv@lists.infradead.org; Wed, 08 Sep 2021 17:45:56 +0000 Received: by mail-pl1-x62e.google.com with SMTP id k17so1812116pls.0 for ; Wed, 08 Sep 2021 10:45:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=h+N6OkYhHFG6aPexfiEFBTlQ664SH/Om3ht1fYTAMcg=; b=V/PY6AojKkWv653U3E0y+FQmnNzosT3tjExRJrOiIulLh5jmurN3fFWiER0RZlc78t OhUvkl2D7I7eHOodBNElsQkxGD4VqEODqFgSYqAI2+bAtsICXJdltqKvbYDdDjRiJDsR ioaJ2S+Koqe8dUXz9MkuOcRaOx+73rpQeeMM6bh79j0FHjnUTYM2Ghp7aqoYkj7ZUbHv Ve7Et+gHLt6GpYa0bj2Ual/N/9dKbGRWqOkSYOQXaq+EhYya0rdjT2cKXeD+vzJlgLr9 4BuiH4BY2apTIub4pxvcXWOKu7bLBCs1d/bmxw6IFEnbjFXx1cY8gCe3awcVzAHSLA7n FFHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=h+N6OkYhHFG6aPexfiEFBTlQ664SH/Om3ht1fYTAMcg=; b=P6YFyvoudBjU4E2QJj8sJlN6chL3JhrHXns3ePJ9ArWAN2yjwKSqqFNooy4PFxIOFS 473+fsiAKO1aH0y9G/wEQvZCHk2GmYbXZ20ldUwOCK1KYunfwyC9eo6cDhYSpvs4teNR ugG5rb9hiw8G1EJi3Y182l9cMtJV0AHk3Q8fA2QFQcfQFkKeb2KJTvG6/ZsdDJ2sOjcQ h5n3K1CW3bWOlcSz2xsyj+w4vIlT8+w1ATMSak3pgRKb/re//yAPq0kp8/cLAvtuj7Iy qcMu9jrf68YHiWT65PPVV6eM6VBwQNUCN2uIUqlJpKKD+RJY1LEKxGYKsJ8X9TIt3Wdn 3xFg== X-Gm-Message-State: AOAM5338umDrjUNEey1gj8+oj2ZYPdlfviav9D8pmiPxm4BZfQ1cZedY daMUJL8wdMbKEt/Kcu0/pN0x3jXRbyNLeQ== X-Google-Smtp-Source: ABdhPJySbvWTwdd3N6nEf3w+/PxJ5kkkgALXiRqxMaP8xiduoZqHtaa4pbzctHastTRN11Wo2pjN7A== X-Received: by 2002:a17:90a:cf08:: with SMTP id h8mr5538295pju.1.1631123154661; Wed, 08 Sep 2021 10:45:54 -0700 (PDT) Received: from hsinchu16.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id b5sm3108466pfr.26.2021.09.08.10.45.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Sep 2021 10:45:54 -0700 (PDT) From: Greentime Hu To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, aou@eecs.berkeley.edu, palmer@dabbelt.com, paul.walmsley@sifive.com, vincent.chen@sifive.com Subject: [RFC PATCH v8 12/21] riscv: signal: Report signal frame size to userspace via auxv Date: Thu, 9 Sep 2021 01:45:24 +0800 Message-Id: X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210908_104555_426592_B1571936 X-CRM114-Status: GOOD ( 15.33 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Vincent Chen The vector register belongs to the signal context. They need to be stored and restored as entering and leaving the signal handler. According to the V-extension specification, the maximum length of the vector registers can be 2^(XLEN-1). Hence, if userspace refers to the MINSIGSTKSZ to create a sigframe, it may not be enough. To resolve this problem, this patch refers to the commit 94b07c1f8c39c ("arm64: signal: Report signal frame size to userspace via auxv") to enable userspace to know the minimum required sigframe size through the auxiliary vector and use it to allocate enough memory for signal context. Signed-off-by: Greentime Hu Signed-off-by: Vincent Chen --- arch/riscv/include/asm/elf.h | 41 +++++++++++++++++----------- arch/riscv/include/asm/processor.h | 2 ++ arch/riscv/include/uapi/asm/auxvec.h | 1 + arch/riscv/kernel/signal.c | 8 ++++++ 4 files changed, 36 insertions(+), 16 deletions(-) diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h index f4b490cd0e5d..1102052aa593 100644 --- a/arch/riscv/include/asm/elf.h +++ b/arch/riscv/include/asm/elf.h @@ -58,22 +58,31 @@ extern unsigned long elf_hwcap; #define ELF_PLATFORM (NULL) #ifdef CONFIG_MMU -#define ARCH_DLINFO \ -do { \ - NEW_AUX_ENT(AT_SYSINFO_EHDR, \ - (elf_addr_t)current->mm->context.vdso); \ - NEW_AUX_ENT(AT_L1I_CACHESIZE, \ - get_cache_size(1, CACHE_TYPE_INST)); \ - NEW_AUX_ENT(AT_L1I_CACHEGEOMETRY, \ - get_cache_geometry(1, CACHE_TYPE_INST)); \ - NEW_AUX_ENT(AT_L1D_CACHESIZE, \ - get_cache_size(1, CACHE_TYPE_DATA)); \ - NEW_AUX_ENT(AT_L1D_CACHEGEOMETRY, \ - get_cache_geometry(1, CACHE_TYPE_DATA)); \ - NEW_AUX_ENT(AT_L2_CACHESIZE, \ - get_cache_size(2, CACHE_TYPE_UNIFIED)); \ - NEW_AUX_ENT(AT_L2_CACHEGEOMETRY, \ - get_cache_geometry(2, CACHE_TYPE_UNIFIED)); \ +#define ARCH_DLINFO \ +do { \ + NEW_AUX_ENT(AT_SYSINFO_EHDR, \ + (elf_addr_t)current->mm->context.vdso); \ + NEW_AUX_ENT(AT_L1I_CACHESIZE, \ + get_cache_size(1, CACHE_TYPE_INST)); \ + NEW_AUX_ENT(AT_L1I_CACHEGEOMETRY, \ + get_cache_geometry(1, CACHE_TYPE_INST)); \ + NEW_AUX_ENT(AT_L1D_CACHESIZE, \ + get_cache_size(1, CACHE_TYPE_DATA)); \ + NEW_AUX_ENT(AT_L1D_CACHEGEOMETRY, \ + get_cache_geometry(1, CACHE_TYPE_DATA)); \ + NEW_AUX_ENT(AT_L2_CACHESIZE, \ + get_cache_size(2, CACHE_TYPE_UNIFIED)); \ + NEW_AUX_ENT(AT_L2_CACHEGEOMETRY, \ + get_cache_geometry(2, CACHE_TYPE_UNIFIED)); \ + /* \ + * Should always be nonzero unless there's a kernel bug. \ + * If we haven't determined a sensible value to give to \ + * userspace, omit the entry: \ + */ \ + if (likely(signal_minsigstksz)) \ + NEW_AUX_ENT(AT_MINSIGSTKSZ, signal_minsigstksz); \ + else \ + NEW_AUX_ENT(AT_IGNORE, 0); \ } while (0) #define ARCH_HAS_SETUP_ADDITIONAL_PAGES struct linux_binprm; diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h index 1b037c69d311..62c75645c606 100644 --- a/arch/riscv/include/asm/processor.h +++ b/arch/riscv/include/asm/processor.h @@ -7,6 +7,7 @@ #define _ASM_RISCV_PROCESSOR_H #include +#include #include @@ -74,6 +75,7 @@ int riscv_of_parent_hartid(struct device_node *node); extern void riscv_fill_hwcap(void); extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src); +extern unsigned long signal_minsigstksz __ro_after_init; #endif /* __ASSEMBLY__ */ #endif /* _ASM_RISCV_PROCESSOR_H */ diff --git a/arch/riscv/include/uapi/asm/auxvec.h b/arch/riscv/include/uapi/asm/auxvec.h index 32c73ba1d531..6610d24e6662 100644 --- a/arch/riscv/include/uapi/asm/auxvec.h +++ b/arch/riscv/include/uapi/asm/auxvec.h @@ -33,5 +33,6 @@ /* entries in ARCH_DLINFO */ #define AT_VECTOR_SIZE_ARCH 7 +#define AT_MINSIGSTKSZ 51 #endif /* _UAPI_ASM_RISCV_AUXVEC_H */ diff --git a/arch/riscv/kernel/signal.c b/arch/riscv/kernel/signal.c index 6938cfa16b45..d30a3b588156 100644 --- a/arch/riscv/kernel/signal.c +++ b/arch/riscv/kernel/signal.c @@ -470,8 +470,16 @@ asmlinkage __visible void do_notify_resume(struct pt_regs *regs, tracehook_notify_resume(regs); } +unsigned long __ro_after_init signal_minsigstksz; + void init_rt_signal_env(void); void __init init_rt_signal_env(void) { rvv_sc_size = sizeof(struct __sc_riscv_v_state) + riscv_vsize; + /* + * Determine the stack space required for guaranteed signal delivery. + * The signal_minsigstksz will be populated into the AT_MINSIGSTKSZ entry + * in the auxiliary array at process startup. + */ + signal_minsigstksz = cal_rt_frame_size(); }