diff mbox series

[v3,3/3] riscv: sophgo: dts: add msi controller for SG2042

Message ID cbe5711193e8d0d1966c5dce6c1f9d7c444a0d69.1736921549.git.unicorn_wang@outlook.com (mailing list archive)
State New
Headers show
Series irqchip: Add Sophgo SG2042 MSI controller | expand

Commit Message

Chen Wang Jan. 15, 2025, 6:34 a.m. UTC 
From: Chen Wang <unicorn_wang@outlook.com>

Add msi-controller node to dts for SG2042.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
---
 arch/riscv/boot/dts/sophgo/sg2042.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)
diff mbox series

Patch

diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
index e62ac51ac55a..02fbb978973c 100644
--- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
@@ -173,6 +173,16 @@  pllclk: clock-controller@70300100c0 {
 			#clock-cells = <1>;
 		};
 
+		msi: msi-controller@7030010300 {
+			compatible = "sophgo,sg2042-msi";
+			reg = <0x70 0x30010300 0x0 0x4>,
+			      <0x70 0x30010304 0x0 0x4>;
+			reg-names = "doorbell", "clr";
+			msi-controller;
+			msi-ranges = <&intc 64 IRQ_TYPE_LEVEL_HIGH 32>;
+			interrupt-parent = <&intc>;
+		};
+
 		rpgate: clock-controller@7030010368 {
 			compatible = "sophgo,sg2042-rpgate";
 			reg = <0x70 0x30010368 0x0 0x98>;