Message ID | db8b7787e9208654cca50484f68334f412be2ea9.1690704360.git.namcaov@gmail.com (mailing list archive) |
---|---|
State | Accepted |
Commit | b18256d9b744497410bc124a94a546c5eef579eb |
Headers | show |
Series | riscv: kprobes: simulate some instructions | expand |
Context | Check | Description |
---|---|---|
conchuod/cover_letter | success | Series has a cover letter |
conchuod/tree_selection | success | Guessed tree name to be for-next at HEAD 471aba2e4760 |
conchuod/fixes_present | success | Fixes tag not required for -next series |
conchuod/maintainers_pattern | success | MAINTAINERS pattern errors before the patch: 4 and now 4 |
conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
conchuod/build_rv64_clang_allmodconfig | success | Errors and warnings before: 9 this patch: 9 |
conchuod/module_param | success | Was 0 now: 0 |
conchuod/build_rv64_gcc_allmodconfig | success | Errors and warnings before: 9 this patch: 9 |
conchuod/build_rv32_defconfig | success | Build OK |
conchuod/dtb_warn_rv64 | success | Errors and warnings before: 3 this patch: 3 |
conchuod/header_inline | success | No static functions without inline keyword in header files |
conchuod/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 63 lines checked |
conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
conchuod/verify_fixes | success | No Fixes tag |
conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
On Sun, Jul 30, 2023 at 10:27:08AM +0200, Nam Cao wrote: > kprobes currently rejects c.jr and c.jalr instructions. Implement them. > > Signed-off-by: Nam Cao <namcaov@gmail.com> > --- > arch/riscv/kernel/probes/decode-insn.c | 4 +-- > arch/riscv/kernel/probes/simulate-insn.c | 37 ++++++++++++++++++++++++ > arch/riscv/kernel/probes/simulate-insn.h | 2 ++ > 3 files changed, 41 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/kernel/probes/decode-insn.c b/arch/riscv/kernel/probes/decode-insn.c > index 39adb07a342d..6dba23a55ac7 100644 > --- a/arch/riscv/kernel/probes/decode-insn.c > +++ b/arch/riscv/kernel/probes/decode-insn.c > @@ -29,14 +29,14 @@ riscv_probe_decode_insn(probe_opcode_t *addr, struct arch_probe_insn *api) > * TODO: the REJECTED ones below need to be implemented > */ > #ifdef CONFIG_RISCV_ISA_C > - RISCV_INSN_REJECTED(c_jr, insn); > RISCV_INSN_REJECTED(c_jal, insn); > - RISCV_INSN_REJECTED(c_jalr, insn); > RISCV_INSN_REJECTED(c_beqz, insn); > RISCV_INSN_REJECTED(c_bnez, insn); > RISCV_INSN_REJECTED(c_ebreak, insn); > > RISCV_INSN_SET_SIMULATE(c_j, insn); > + RISCV_INSN_SET_SIMULATE(c_jr, insn); > + RISCV_INSN_SET_SIMULATE(c_jalr, insn); > #endif > > RISCV_INSN_SET_SIMULATE(jal, insn); > diff --git a/arch/riscv/kernel/probes/simulate-insn.c b/arch/riscv/kernel/probes/simulate-insn.c > index 3ba45c612cd8..1ead6f4951f9 100644 > --- a/arch/riscv/kernel/probes/simulate-insn.c > +++ b/arch/riscv/kernel/probes/simulate-insn.c > @@ -212,3 +212,40 @@ bool __kprobes simulate_c_j(u32 opcode, unsigned long addr, struct pt_regs *regs > > return true; > } > + > +static bool __kprobes simulate_c_jr_jalr(u32 opcode, unsigned long addr, struct pt_regs *regs, > + bool is_jalr) > +{ > + /* > + * 15 12 11 7 6 2 1 0 > + * | funct4 | rs1 | rs2 | op | > + * 4 5 5 2 > + */ > + > + unsigned long jump_addr; > + > + u32 rs1 = (opcode >> 7) & 0x1f; > + > + if (rs1 == 0) /* C.JR is only valid when rs1 != x0 */ > + return false; > + > + if (!rv_insn_reg_get_val(regs, rs1, &jump_addr)) > + return false; > + > + if (is_jalr && !rv_insn_reg_set_val(regs, 1, addr + 2)) > + return false; > + > + instruction_pointer_set(regs, jump_addr); > + > + return true; > +} > + > +bool __kprobes simulate_c_jr(u32 opcode, unsigned long addr, struct pt_regs *regs) > +{ > + return simulate_c_jr_jalr(opcode, addr, regs, false); > +} > + > +bool __kprobes simulate_c_jalr(u32 opcode, unsigned long addr, struct pt_regs *regs) > +{ > + return simulate_c_jr_jalr(opcode, addr, regs, true); > +} > diff --git a/arch/riscv/kernel/probes/simulate-insn.h b/arch/riscv/kernel/probes/simulate-insn.h > index 4bd6c266e7d3..472a1948ec4f 100644 > --- a/arch/riscv/kernel/probes/simulate-insn.h > +++ b/arch/riscv/kernel/probes/simulate-insn.h > @@ -25,5 +25,7 @@ bool simulate_branch(u32 opcode, unsigned long addr, struct pt_regs *regs); > bool simulate_jal(u32 opcode, unsigned long addr, struct pt_regs *regs); > bool simulate_jalr(u32 opcode, unsigned long addr, struct pt_regs *regs); > bool simulate_c_j(u32 opcode, unsigned long addr, struct pt_regs *regs); > +bool simulate_c_jr(u32 opcode, unsigned long addr, struct pt_regs *regs); > +bool simulate_c_jalr(u32 opcode, unsigned long addr, struct pt_regs *regs); > > #endif /* _RISCV_KERNEL_PROBES_SIMULATE_INSN_H */ > -- > 2.34.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv You can add: Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
diff --git a/arch/riscv/kernel/probes/decode-insn.c b/arch/riscv/kernel/probes/decode-insn.c index 39adb07a342d..6dba23a55ac7 100644 --- a/arch/riscv/kernel/probes/decode-insn.c +++ b/arch/riscv/kernel/probes/decode-insn.c @@ -29,14 +29,14 @@ riscv_probe_decode_insn(probe_opcode_t *addr, struct arch_probe_insn *api) * TODO: the REJECTED ones below need to be implemented */ #ifdef CONFIG_RISCV_ISA_C - RISCV_INSN_REJECTED(c_jr, insn); RISCV_INSN_REJECTED(c_jal, insn); - RISCV_INSN_REJECTED(c_jalr, insn); RISCV_INSN_REJECTED(c_beqz, insn); RISCV_INSN_REJECTED(c_bnez, insn); RISCV_INSN_REJECTED(c_ebreak, insn); RISCV_INSN_SET_SIMULATE(c_j, insn); + RISCV_INSN_SET_SIMULATE(c_jr, insn); + RISCV_INSN_SET_SIMULATE(c_jalr, insn); #endif RISCV_INSN_SET_SIMULATE(jal, insn); diff --git a/arch/riscv/kernel/probes/simulate-insn.c b/arch/riscv/kernel/probes/simulate-insn.c index 3ba45c612cd8..1ead6f4951f9 100644 --- a/arch/riscv/kernel/probes/simulate-insn.c +++ b/arch/riscv/kernel/probes/simulate-insn.c @@ -212,3 +212,40 @@ bool __kprobes simulate_c_j(u32 opcode, unsigned long addr, struct pt_regs *regs return true; } + +static bool __kprobes simulate_c_jr_jalr(u32 opcode, unsigned long addr, struct pt_regs *regs, + bool is_jalr) +{ + /* + * 15 12 11 7 6 2 1 0 + * | funct4 | rs1 | rs2 | op | + * 4 5 5 2 + */ + + unsigned long jump_addr; + + u32 rs1 = (opcode >> 7) & 0x1f; + + if (rs1 == 0) /* C.JR is only valid when rs1 != x0 */ + return false; + + if (!rv_insn_reg_get_val(regs, rs1, &jump_addr)) + return false; + + if (is_jalr && !rv_insn_reg_set_val(regs, 1, addr + 2)) + return false; + + instruction_pointer_set(regs, jump_addr); + + return true; +} + +bool __kprobes simulate_c_jr(u32 opcode, unsigned long addr, struct pt_regs *regs) +{ + return simulate_c_jr_jalr(opcode, addr, regs, false); +} + +bool __kprobes simulate_c_jalr(u32 opcode, unsigned long addr, struct pt_regs *regs) +{ + return simulate_c_jr_jalr(opcode, addr, regs, true); +} diff --git a/arch/riscv/kernel/probes/simulate-insn.h b/arch/riscv/kernel/probes/simulate-insn.h index 4bd6c266e7d3..472a1948ec4f 100644 --- a/arch/riscv/kernel/probes/simulate-insn.h +++ b/arch/riscv/kernel/probes/simulate-insn.h @@ -25,5 +25,7 @@ bool simulate_branch(u32 opcode, unsigned long addr, struct pt_regs *regs); bool simulate_jal(u32 opcode, unsigned long addr, struct pt_regs *regs); bool simulate_jalr(u32 opcode, unsigned long addr, struct pt_regs *regs); bool simulate_c_j(u32 opcode, unsigned long addr, struct pt_regs *regs); +bool simulate_c_jr(u32 opcode, unsigned long addr, struct pt_regs *regs); +bool simulate_c_jalr(u32 opcode, unsigned long addr, struct pt_regs *regs); #endif /* _RISCV_KERNEL_PROBES_SIMULATE_INSN_H */
kprobes currently rejects c.jr and c.jalr instructions. Implement them. Signed-off-by: Nam Cao <namcaov@gmail.com> --- arch/riscv/kernel/probes/decode-insn.c | 4 +-- arch/riscv/kernel/probes/simulate-insn.c | 37 ++++++++++++++++++++++++ arch/riscv/kernel/probes/simulate-insn.h | 2 ++ 3 files changed, 41 insertions(+), 2 deletions(-)