| Message ID | tencent_D935633C42BE1A7BF8C80553B5571C737009@qq.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | riscv: add initial support for SpacemiT K1 | expand |
On 01:20 Mon 17 Jun , Yangyu Chen wrote: > The first SoC in the SpacemiT series is K1, which contains 8 RISC-V > cores with RISC-V Vector v1.0 support. > > Link: https://www.spacemit.com/en/spacemit-key-stone-2/ > > Signed-off-by: Yangyu Chen <cyy@cyyself.name> > --- > arch/riscv/Kconfig.socs | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs > index f51bb24bc84c..8a5775586845 100644 > --- a/arch/riscv/Kconfig.socs > +++ b/arch/riscv/Kconfig.socs > @@ -24,6 +24,11 @@ config ARCH_SOPHGO > help > This enables support for Sophgo SoC platform hardware. > > +config ARCH_SPACEMIT > + bool "Sophgo SoCs" ~~~~~ is this a copy & paste typo? > + help > + This enables support for SpacemiT SoC platform hardware. > + > config ARCH_STARFIVE > def_bool SOC_STARFIVE > > -- > 2.45.1 >
On 01:20 Mon 17 Jun , Yangyu Chen wrote: > The first SoC in the SpacemiT series is K1, which contains 8 RISC-V > cores with RISC-V Vector v1.0 support. > > Link: https://www.spacemit.com/en/spacemit-key-stone-2/ > > Signed-off-by: Yangyu Chen <cyy@cyyself.name> > --- > arch/riscv/Kconfig.socs | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs > index f51bb24bc84c..8a5775586845 100644 > --- a/arch/riscv/Kconfig.socs > +++ b/arch/riscv/Kconfig.socs > @@ -24,6 +24,11 @@ config ARCH_SOPHGO > help > This enables support for Sophgo SoC platform hardware. > > +config ARCH_SPACEMIT should this be SOC_SPACEMIT? as it contradict with patch [9/9] > + bool "Sophgo SoCs" > + help > + This enables support for SpacemiT SoC platform hardware. > + > config ARCH_STARFIVE > def_bool SOC_STARFIVE > > -- > 2.45.1 >
> On Jun 17, 2024, at 07:06, Yixun Lan <dlan@gentoo.org> wrote: > > On 01:20 Mon 17 Jun , Yangyu Chen wrote: > >> The first SoC in the SpacemiT series is K1, which contains 8 RISC-V >> cores with RISC-V Vector v1.0 support. >> >> Link: https://www.spacemit.com/en/spacemit-key-stone-2/ >> >> Signed-off-by: Yangyu Chen <cyy@cyyself.name> >> --- >> arch/riscv/Kconfig.socs | 5 +++++ >> 1 file changed, 5 insertions(+) >> >> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs >> index f51bb24bc84c..8a5775586845 100644 >> --- a/arch/riscv/Kconfig.socs >> +++ b/arch/riscv/Kconfig.socs >> @@ -24,6 +24,11 @@ config ARCH_SOPHGO >> help >> This enables support for Sophgo SoC platform hardware. >> >> +config ARCH_SPACEMIT > > should this be SOC_SPACEMIT? as it contradict with patch [9/9] Oh. It’s my fault. It should be ARCH_SPACEMIT on patch [9/9]. >> + bool "Sophgo SoCs" >> + help >> + This enables support for SpacemiT SoC platform hardware. >> + >> config ARCH_STARFIVE >> def_bool SOC_STARFIVE >> >> -- >> 2.45.1 >> > > -- > Yixun Lan (dlan) > Gentoo Linux Developer > GPG Key ID AABEFD55
> On Jun 17, 2024, at 06:26, Yixun Lan <dlan@gentoo.org> wrote: > > On 01:20 Mon 17 Jun , Yangyu Chen wrote: >> The first SoC in the SpacemiT series is K1, which contains 8 RISC-V >> cores with RISC-V Vector v1.0 support. >> >> Link: https://www.spacemit.com/en/spacemit-key-stone-2/ >> >> Signed-off-by: Yangyu Chen <cyy@cyyself.name> >> --- >> arch/riscv/Kconfig.socs | 5 +++++ >> 1 file changed, 5 insertions(+) >> >> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs >> index f51bb24bc84c..8a5775586845 100644 >> --- a/arch/riscv/Kconfig.socs >> +++ b/arch/riscv/Kconfig.socs >> @@ -24,6 +24,11 @@ config ARCH_SOPHGO >> help >> This enables support for Sophgo SoC platform hardware. >> >> +config ARCH_SPACEMIT >> + bool "Sophgo SoCs" > ~~~~~ is this a copy & paste typo? Yes. I will fix them soon. >> + help >> + This enables support for SpacemiT SoC platform hardware. >> + >> config ARCH_STARFIVE >> def_bool SOC_STARFIVE >> >> -- >> 2.45.1 >> > > -- > Yixun Lan (dlan) > Gentoo Linux Developer > GPG Key ID AABEFD55
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index f51bb24bc84c..8a5775586845 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -24,6 +24,11 @@ config ARCH_SOPHGO help This enables support for Sophgo SoC platform hardware. +config ARCH_SPACEMIT + bool "Sophgo SoCs" + help + This enables support for SpacemiT SoC platform hardware. + config ARCH_STARFIVE def_bool SOC_STARFIVE
The first SoC in the SpacemiT series is K1, which contains 8 RISC-V cores with RISC-V Vector v1.0 support. Link: https://www.spacemit.com/en/spacemit-key-stone-2/ Signed-off-by: Yangyu Chen <cyy@cyyself.name> --- arch/riscv/Kconfig.socs | 5 +++++ 1 file changed, 5 insertions(+)