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[84.72.105.84]) by smtp.gmail.com with ESMTPSA id n10sm3255724ejk.86.2021.08.20.11.28.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Aug 2021 11:28:14 -0700 (PDT) From: Nicolas Frattaroli To: Cc: Nicolas Frattaroli , alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 0/4] Rockchip I2S/TDM controller Date: Fri, 20 Aug 2021 20:27:27 +0200 Message-Id: <20210820182731.29370-1-frattaroli.nicolas@gmail.com> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210820_112816_855955_BB459724 X-CRM114-Status: GOOD ( 30.20 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Changes in v2: - remove ad-hoc writeq and needless (and broken) optimisation in reset assert/deassert. This wouldn't have worked on Big Endian, and would've been pointless on any other platform, as the overhead for saving one write was comparatively big - fix various checkpatch issues - get rid of leftover clk-trcm in schema - set status = "okay" in example in schema instead of "disabled" - change dma-names so rx is first, adjust device trees as necessary - properly reference uint32-array for rx-route and tx-route instead of uint32 - replace trcm-sync with two boolean properties, adjust DT changes accordingly and also get rid of the header file - get rid of rockchip,no-dmaengine. This was only needed for some downstream driver and shouldn't be in the DT - get rid of rockchip,capture-only/playback-only. Rationale being that I have no way to test whether they're needed, and unconditionally setting channels_min to 0 breaks everything - change hclk description in "clocks" Additionally, I have been made aware that registers and code seem to be an extension of the rockchip_i2s driver. This is true, though merging the two seems like more effort than just slapping a few compatibles and properties into the mix. I'll investigate it further in the coming weeks, but would likely still prefer basing any unified driver on mine rather than the other way around, since I think it has better code quality now. Original cover letter: Hello, I come bearing four patches for your consideration. The first of these four patches adds a driver for the Rockchip I2S/TDM controller, used in interfacing between the AHB bus and the I2S bus on some Rockchip SoCs. This allows for audio playback with a matching codec. The controller has three different modes: I2S, I2S/TDM and PCM. It is distinct from the earlier Rockchip I2S controller, and therefore not just an extension of that driver. The driver is based on the downstream version, though various changes have been made to hopefully make it more palatable to upstream. Some needless code duplication has been refactored, and the probe function will no longer let wrong device tree values write nonsense to hardware registers. Properties have been renamed and had their semantics changed. I won't bore you with the details of what downstream did, since that's not what I'm submitting, but the changes are significant enough that I've added myself to the list of authors. The second patch adds the YAML device tree bindings for this, which have been written from scratch by yours truly. Since I didn't like having random integers mean things, I defined them as constants in a header file for the bindings. The third patch adds the i2s1 controller to the rk356x device tree. I didn't add any of the other i2s controllers on that SoC for now as I have no way of testing them; in particular, i2s0 is tied to HDMI, so needs a functioning VOP2 driver to even have a chance of working. The fourth patch makes use of the i2s1 controller to enable analog audio output on the Quartz64 Model A through its RK817 codec. I've tested this to work properly at both 44.1 kHz and 96 kHz, so both mclk_root0 and mclk_root1 are definitely functioning. This is my first kernel contribution, so I most likely did something horribly wrong. That's why I'm more than happy to receive any criticisms and concerns over how the driver is implemented, because I've run out of ideas on how to make it clearly better myself. I'd also like to extend my thanks to Peter Geis, who has been acting as somewhat of a mentor and gave me occasional feedback and ideas during the writing of this patch series. Regards, Nicolas Frattaroli Nicolas Frattaroli (4): ASoC: rockchip: add support for i2s-tdm controller dt-bindings: sound: add rockchip i2s-tdm binding arm64: dts: rockchip: add i2s1 on rk356x arm64: dts: rockchip: add analog audio on Quartz64 .../bindings/sound/rockchip,i2s-tdm.yaml | 193 ++ .../boot/dts/rockchip/rk3566-quartz64-a.dts | 35 +- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 26 + sound/soc/rockchip/Kconfig | 11 + sound/soc/rockchip/Makefile | 2 + sound/soc/rockchip/rockchip_i2s_tdm.c | 1737 +++++++++++++++++ sound/soc/rockchip/rockchip_i2s_tdm.h | 398 ++++ 7 files changed, 2401 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml create mode 100644 sound/soc/rockchip/rockchip_i2s_tdm.c create mode 100644 sound/soc/rockchip/rockchip_i2s_tdm.h