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Mon, 28 Oct 2019 14:47:49 +0000 Received: from wp126.webpack.hosteurope.de ([2a01:488:42:1000:50ed:8485::]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1iP6J1-0005I6-Cu; Mon, 28 Oct 2019 14:47:41 +0000 Received: from [2003:a:659:3f00:1e6f:65ff:fe31:d1d5] (helo=hermes.fivetechno.de); authenticated by wp126.webpack.hosteurope.de running ExIM with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) id 1iP6Iu-0001Vm-4x; Mon, 28 Oct 2019 15:47:32 +0100 X-Virus-Scanned: by amavisd-new 2.11.1 using newest ClamAV at linuxbbg.five-lan.de Received: from [192.168.34.101] (p5098d998.dip0.t-ipconnect.de [80.152.217.152]) (authenticated bits=0) by hermes.fivetechno.de (8.15.2/8.14.5/SuSE Linux 0.8) with ESMTPSA id x9SElRRZ013718 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NO); Mon, 28 Oct 2019 15:47:28 +0100 From: Markus Reichl Subject: [PATCH] arm64: dts: rockchip: Add PCIe node on rk3399-roc-pc To: Rob Herring , Mark Rutland , Heiko Stuebner , Jagan Teki , Markus Reichl , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Autocrypt: addr=m.reichl@fivetechno.de; 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Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.1.1 MIME-Version: 1.0 Content-Language: de-DE X-bounce-key: webpack.hosteurope.de; m.reichl@fivetechno.de; 1572274059; 38797eff; X-HE-SMSGID: 1iP6Iu-0001Vm-4x X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191028_074739_582813_97F47AD6 X-CRM114-Status: GOOD ( 12.85 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 SPF_NONE SPF: sender does not publish an SPF Record X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org rk3399-roc-pc has a PCIe interface. Enable it for use with the M.2 NGFF M_KEY slot on roc-rk3399-mezzanine board. Tested with Samsung 970 evo plus SSD. Signed-off-by: Markus Reichl --- .../arm64/boot/dts/rockchip/rk3399-roc-pc.dts | 38 +++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts index 9313251765c7..2d637d54994b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts @@ -158,6 +158,21 @@ regulator-max-microvolt = <1400000>; vin-supply = <&vcc_sys>; }; + + /* on roc-rk3399-mezzanine board */ + vcc3v3_pcie: vcc3v3-pcie { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_pcie"; + enable-active-high; + gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc3v3_pcie_en>; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_12v>; + }; }; &cpu_l0 { @@ -514,6 +529,19 @@ status = "okay"; }; +&pcie_phy { + status = "okay"; +}; + +&pcie0 { + ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; + num-lanes = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_perst>; + vpcie3v3-supply = <&vcc3v3_pcie>; + status = "okay"; +}; + &pinctrl { lcd-panel { lcd_panel_reset: lcd-panel-reset { @@ -535,6 +563,16 @@ }; }; + pcie { + vcc3v3_pcie_en: vcc3v3-pcie-en { + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie_perst: pcie-perst { + rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + pmic { vsel1_gpio: vsel1-gpio { rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;