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Wed, 22 Oct 2014 00:54:50 -0700 (PDT) From: "jinkun.hong" To: linus.walleij@linaro.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v6 2/3] dt-bindings: add document of Rockchip power domain Date: Wed, 22 Oct 2014 00:53:43 -0700 Message-Id: <1413964424-7599-3-git-send-email-jinkun.hong@rock-chips.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1413964424-7599-1-git-send-email-jinkun.hong@rock-chips.com> References: <1413964424-7599-1-git-send-email-jinkun.hong@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141022_005518_166627_59AE8F39 X-CRM114-Status: GOOD ( 10.61 ) X-Spam-Score: -1.1 (-) Cc: Mark Rutland , devicetree@vger.kernel.org, Ulf Hansson , Russell King , Heiko Stuebner , Pawel Moll , Ian Campbell , "jinkun.hong" , Randy Dunlap , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, linux-rockchip@lists.infradead.org, Rob Herring , Kumar Gala , Grant Likely , Jack Dai X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-3.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: "jinkun.hong" Signed-off-by: Jack Dai Signed-off-by: jinkun.hong --- Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: - DT structure has changed Changes in v2: - move clocks to "optional" .../bindings/arm/rockchip/power_domain.txt | 46 ++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/rockchip/power_domain.txt diff --git a/Documentation/devicetree/bindings/arm/rockchip/power_domain.txt b/Documentation/devicetree/bindings/arm/rockchip/power_domain.txt new file mode 100644 index 0000000..f8357b3 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/rockchip/power_domain.txt @@ -0,0 +1,46 @@ +* Rockchip Power Domains + +Rockchip processors include support for multiple power domains which can be +powered up/down by software based on different application scenes to save power. + +Required properties for power domain controller: +- compatible: should be one of the following. + * rockchip,rk3288-power-gpu - for rk3288 type gpu power domain. + * rockchip,rk3288-power-hevc - for rk3288 type hevc power domain. + * rockchip,rk3288-power-video - for rk3288 type video power domain. + * rockchip,rk3288-power-vio - for rk3288 type vio power domain. +- rockchip,pmu: phandle referencing a syscon providing the pmu registers +- #power-domain-cells: Number of cells in a power-domain specifier. + should be 0. + +Example: + + gpu_power: gpu-power-controller { + compatible = "rockchip,rk3288-power-gpu"; + rockchip,pmu = <&pmu>; + #power-domain-cells = <0>; + }; + + hevc_power: hevc-power-controller { + compatible = "rockchip,rk3288-power-hevc"; + rockchip,pmu = <&pmu>; + #power-domain-cells = <0>; + }; + + video_power: video-power-controller { + compatible = "rockchip,rk3288-power-video"; + rockchip,pmu = <&pmu>; + #power-domain-cells = <0>; + }; + + vio_power: vio-power-controller { + compatible = "rockchip,rk3288-power-vio"; + rockchip,pmu = <&pmu>; + #power-domain-cells = <0>; + }; + + gpu: gpu@0xffa30000 { + ... + power-domains = <&gpu_power>; + ... + };