From patchwork Tue Feb 3 15:13:49 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yakir Yang X-Patchwork-Id: 5769281 Return-Path: X-Original-To: patchwork-linux-rockchip@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0BFFFBF440 for ; Tue, 3 Feb 2015 15:15:17 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 31D222022D for ; Tue, 3 Feb 2015 15:15:16 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 58B5F200E3 for ; Tue, 3 Feb 2015 15:15:15 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YIfC7-0005mC-0D; Tue, 03 Feb 2015 15:15:15 +0000 Received: from regular1.263xmail.com ([211.150.99.134]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YIfBu-00047S-C2; Tue, 03 Feb 2015 15:15:03 +0000 Received: from ykk?rock-chips.com (unknown [192.168.167.228]) by regular1.263xmail.com (Postfix) with SMTP id DDB2B6E8F; Tue, 3 Feb 2015 23:14:29 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id 12228455; Tue, 3 Feb 2015 23:14:04 +0800 (CST) X-RL-SENDER: ykk@rock-chips.com X-FST-TO: airlied@linux.ie X-SENDER-IP: 192.253.240.203 X-LOGIN-NAME: ykk@rock-chips.com X-UNIQUE-TAG: <3de2a163a79ec0c65a12ac597cb3ac6d> X-ATTACHMENT-NUM: 0 X-SENDER: ykk@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [192.253.240.203]) by smtp.263.net (Postfix) whith ESMTP id 75999F3K0L; Tue, 03 Feb 2015 23:14:28 +0800 (CST) From: Yakir Yang To: David Airlie , Russell King , Philipp Zabel Subject: [PATCH v3 07/15] drm: bridge/dw_hdmi: set ncts_atomic_write & cts_manual Date: Tue, 3 Feb 2015 10:13:49 -0500 Message-Id: <1422976429-30212-1-git-send-email-ykk@rock-chips.com> X-Mailer: git-send-email 2.1.2 In-Reply-To: <1422975418-13302-1-git-send-email-ykk@rock-chips.com> References: <1422975418-13302-1-git-send-email-ykk@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150203_071502_921332_E747CE9F X-CRM114-Status: UNSURE ( 8.15 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 1.7 (+) Cc: Mark Rutland , alsa-devel@alsa-project.org, Heiko Stuebner , djkurtz@chromium.org, dianders@chromium.org, Yakir Yang , mmind00@googlemail.com, Pawel Moll , linux-rockchip@lists.infradead.org, Sean Cross , devicetree@vger.kernel.org, Arnd Bergmann , Ian Campbell , Jyri Sarha , Ben Zhang , Rob Herring , dri-devel@lists.freedesktop.org, marcheu@chromium.org, linux-arm-kernel@lists.infradead.org, Mark Yao , Fabio Estevam , linux-kernel@vger.kernel.org, Rob Clark , Daniel Vetter , Kumar Gala , Shawn Guo X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY, URIBL_BLACK autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The ncts_atomic_write & cts_manual bits are present when design id equal to 0x20. After set the ncts_atomic_write, then the new N and CTS values are only used when aud_n1 register is updated. After set cts_manual bit, the new CTS value can set by AudCTS registers. - write N3 ncts_atomic_write = 1 - write CTS3 CTS_manual = 1 Signed-off-by: Yakir Yang --- Changes in v3: - Set ncts_atomic_write & cts_manual Changes in v2: None drivers/gpu/drm/bridge/dw_hdmi.c | 13 +++++++++++-- drivers/gpu/drm/bridge/dw_hdmi.h | 6 ++++++ 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/dw_hdmi.c b/drivers/gpu/drm/bridge/dw_hdmi.c index 81309df..b0b2605 100644 --- a/drivers/gpu/drm/bridge/dw_hdmi.c +++ b/drivers/gpu/drm/bridge/dw_hdmi.c @@ -199,8 +199,15 @@ static void hdmi_mask_writeb(struct dw_hdmi *hdmi, u8 data, unsigned int reg, static void hdmi_set_clock_regenerator(struct dw_hdmi *hdmi, unsigned int n, unsigned int cts) { + if (hdmi->id.design == 0x20) { + /* set ncts_atomic_write */ + hdmi_writeb(hdmi, HDMI_AUD_N3_NCTS_ATOMIC_WRITE_SET, + HDMI_AUD_N3); + } + /* Must be set/cleared first */ - hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3); + hdmi_modb(hdmi, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3_CTS_MANUAL, + HDMI_AUD_CTS3); /* nshift factor = 0 */ hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3); @@ -210,7 +217,9 @@ static void hdmi_set_clock_regenerator(struct dw_hdmi *hdmi, hdmi_writeb(hdmi, (cts >> 8) & 0xff, HDMI_AUD_CTS2); hdmi_writeb(hdmi, cts & 0xff, HDMI_AUD_CTS1); - hdmi_writeb(hdmi, (n >> 16) & 0x0f, HDMI_AUD_N3); + /* set n values */ + hdmi_modb(hdmi, (n >> 16) & HDMI_AUD_N3_AUDN19_16_MASK, + HDMI_AUD_N3_AUDN19_16_MASK, HDMI_AUD_N3); hdmi_writeb(hdmi, (n >> 8) & 0xff, HDMI_AUD_N2); hdmi_writeb(hdmi, n & 0xff, HDMI_AUD_N1); } diff --git a/drivers/gpu/drm/bridge/dw_hdmi.h b/drivers/gpu/drm/bridge/dw_hdmi.h index e4ba634..29e4bee 100644 --- a/drivers/gpu/drm/bridge/dw_hdmi.h +++ b/drivers/gpu/drm/bridge/dw_hdmi.h @@ -907,6 +907,12 @@ enum { HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL = 0x08, HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_MASK = 0x04, +/* AUD_N3 field values */ + HDMI_AUD_N3_NCTS_ATOMIC_WRITE_MASK = 0x80, + HDMI_AUD_N3_NCTS_ATOMIC_WRITE_SET = 0x80, + HDMI_AUD_N3_NCTS_ATOMIC_WRITE_CLEAR = 0x00, + HDMI_AUD_N3_AUDN19_16_MASK = 0x0f, + /* AUD_CTS3 field values */ HDMI_AUD_CTS3_N_SHIFT_OFFSET = 5, HDMI_AUD_CTS3_N_SHIFT_MASK = 0xe0,