From patchwork Thu Dec 17 14:21:49 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 7873691 Return-Path: X-Original-To: patchwork-linux-rockchip@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 54BDE9F1C2 for ; Thu, 17 Dec 2015 14:23:34 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4F15A2042A for ; Thu, 17 Dec 2015 14:23:32 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 48EAB2042C for ; Thu, 17 Dec 2015 14:23:31 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1a9ZSs-0003OI-Pg; Thu, 17 Dec 2015 14:23:30 +0000 Received: from mail-pf0-f170.google.com ([209.85.192.170]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1a9ZSY-00035S-3Y; Thu, 17 Dec 2015 14:23:11 +0000 Received: by mail-pf0-f170.google.com with SMTP id o64so31764958pfb.3; Thu, 17 Dec 2015 06:22:53 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=5G6BZZF0NN2XbBItx+2n1VfqoETkdT4VrGlgMx6iF60=; b=KgzgzPR34hq2b5R9aJJWHQJb8kS+W41Sd6Ee8iJZ6WLlGyg6bJV3HV+BAp5D20XDjy dOy6LtEHzE/zcCoAA4ST+9mwUpVW/2mVLS0LCYXv4+Tt9cXeKmaXXw6Zt0gFO9TlTJS3 rbm7kVjNyw+hYfbIkxb311EKf2ehOnBM1Nf7W9vBUS8Oc7ZBNdtpM0Jpro28n7LYJMy5 rqF5p63kUhbglMJC5gNfZg9oQL6bRZjP5Ef9fYIPy3nd5GjQMtc4+yrA6ZLRg9kXyFKs YAVp2S1boZQyti8+E7reLjd6FPsQcHo8di4kDE/JRF1rkdtVG3aYjVpVFblvS2LwS5BN EdaA== X-Received: by 10.98.70.156 with SMTP id o28mr14543200pfi.43.1450362173195; Thu, 17 Dec 2015 06:22:53 -0800 (PST) Received: from localhost.localdomain ([103.46.142.20]) by smtp.gmail.com with ESMTPSA id mj1sm16264330pab.34.2015.12.17.06.22.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 17 Dec 2015 06:22:52 -0800 (PST) From: Caesar Wang To: heiko@sntech.de Subject: [PATCH v1 3/6] ARM: dts: add the sdio/sdmmc node for rk3036 Date: Thu, 17 Dec 2015 22:21:49 +0800 Message-Id: <1450362112-8075-4-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1450362112-8075-1-git-send-email-wxt@rock-chips.com> References: <1450362112-8075-1-git-send-email-wxt@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151217_062310_324248_D0323287 X-CRM114-Status: UNSURE ( 9.61 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.6 (--) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, keescook@google.com, leozwang@google.com, Caesar Wang MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In general, the sdio/sdmmc is used by the wifi module and sd card. let's add the node for these function. Signed-off-by: Caesar Wang --- arch/arm/boot/dts/rk3036.dtsi | 72 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 11a8078..947d070 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -55,6 +55,8 @@ i2c1 = &i2c1; i2c2 = &i2c2; mshc0 = &emmc; + mshc1 = &sdmmc; + mshc2 = &sdio; serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; @@ -215,6 +217,30 @@ status = "disabled"; }; + sdmmc: dwmmc@10214000 { + compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc"; + clock-frequency = <37500000>; + clock-freq-min-max = <400000 37500000>; + clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; + clock-names = "biu", "ciu"; + fifo-depth = <0x100>; + interrupts = ; + reg = <0x10214000 0x4000>; + status = "disabled"; + }; + + sdio: dwmmc@10218000 { + compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc"; + clock-freq-min-max = <400000 37500000>; + clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, + <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; + clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; + fifo-depth = <0x100>; + interrupts = ; + reg = <0x10218000 0x4000>; + status = "disabled"; + }; + emmc: dwmmc@1021c000 { compatible = "rockchip,rk3288-dw-mshc"; reg = <0x1021c000 0x4000>; @@ -511,6 +537,52 @@ }; }; + sdmmc { + sdmmc_clk: sdmmc-clk { + rockchip,pins = <1 16 RK_FUNC_1 &pcfg_pull_none>; + }; + + sdmmc_cmd: sdmmc-cmd { + rockchip,pins = <1 15 RK_FUNC_1 &pcfg_pull_default>; + }; + + sdmmc_cd: sdmcc-cd { + rockchip,pins = <1 17 RK_FUNC_1 &pcfg_pull_default>; + }; + + sdmmc_bus1: sdmmc-bus1 { + rockchip,pins = <1 18 RK_FUNC_1 &pcfg_pull_default>; + }; + + sdmmc_bus4: sdmmc-bus4 { + rockchip,pins = <1 18 RK_FUNC_1 &pcfg_pull_default>, + <1 19 RK_FUNC_1 &pcfg_pull_default>, + <1 20 RK_FUNC_1 &pcfg_pull_default>, + <1 21 RK_FUNC_1 &pcfg_pull_default>; + }; + }; + + sdio { + sdio_bus1: sdio-bus1 { + rockchip,pins = <0 11 RK_FUNC_1 &pcfg_pull_default>; + }; + + sdio_bus4: sdio-bus4 { + rockchip,pins = <0 11 RK_FUNC_1 &pcfg_pull_default>, + <0 12 RK_FUNC_1 &pcfg_pull_default>, + <0 13 RK_FUNC_1 &pcfg_pull_default>, + <0 14 RK_FUNC_1 &pcfg_pull_default>; + }; + + sdio_cmd: sdio-cmd { + rockchip,pins = <0 8 RK_FUNC_1 &pcfg_pull_default>; + }; + + sdio_clk: sdio-clk { + rockchip,pins = <0 9 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + emmc { /* * We run eMMC at max speed; bump up drive strength.