From patchwork Mon Apr 11 01:54:12 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Finley Xiao X-Patchwork-Id: 8795831 Return-Path: X-Original-To: patchwork-linux-rockchip@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 64D899F36E for ; Mon, 11 Apr 2016 01:57:12 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A94FE20221 for ; Mon, 11 Apr 2016 01:57:07 +0000 (UTC) Received: from bombadil.infradead.org (unknown [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CFC70201B4 for ; Mon, 11 Apr 2016 01:57:06 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1apR5v-0004Q7-32; Mon, 11 Apr 2016 01:56:51 +0000 Received: from regular1.263xmail.com ([211.150.99.137]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1apR5k-00047n-A0; Mon, 11 Apr 2016 01:56:41 +0000 Received: from finley.xiao?rock-chips.com (unknown [192.168.167.229]) by regular1.263xmail.com (Postfix) with SMTP id 5C02DDBC1; Mon, 11 Apr 2016 09:56:09 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-KSVirus-check: 0 Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id 7F0512F45; Mon, 11 Apr 2016 09:56:06 +0800 (CST) X-RL-SENDER: finley.xiao@rock-chips.com X-FST-TO: mturquette@baylibre.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: finley.xiao@rock-chips.com X-UNIQUE-TAG: <0e57eaed51939fed015249ad8e2843f1> X-ATTACHMENT-NUM: 0 X-SENDER: xf@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith ESMTP id 28051VC5O5C; Mon, 11 Apr 2016 09:56:08 +0800 (CST) From: Finlye Xiao To: mturquette@baylibre.com, sboyd@codeaurora.org, heiko@sntech.de Subject: [PATCH v1] clk: Add clk_composite_set_rate_and_parent Date: Mon, 11 Apr 2016 09:54:12 +0800 Message-Id: <1460339652-63498-1-git-send-email-finley.xiao@rock-chips.com> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160410_185641_579348_451534F7 X-CRM114-Status: UNSURE ( 8.26 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.6 (--) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangtao@rock-chips.com, zhengxing@rock-chips.com, xxx@rock-chips.com, zhangqing@rock-chips.com, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Finley Xiao , zyw@rock-chips.com, jay.xu@rock-chips.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, wxt@rock-chips.com MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-3.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RDNS_NONE,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Finley Xiao Some of Rockchip's clocks should consider the priority of .set_parent and .set_rate to prevent a too large temporary clock rate. For example, the gpu clock can be parented to cpll(750MHz) and usbphy_480m(480MHz), 375MHz comes from cpll and the div is set to 2, 480MHz comes from usbphy_480m and the div is set to 1. From the code, when change rate from 480MHz to 375MHz, it changes the gpu's parent from USBPHY_480M to cpll first(.set_parent), but the div value is still 1 and the gpu's rate will be 750MHz at the moment, then it changes the div value from 1 to 2(.set_rate) and the gpu's rate will be changed to 375MHz(480MHZ->750MHz->375MHz), here temporary rate is 750MHz, the voltage which supply for 480MHz certainly can not supply for 750MHz, so the gpu will crash. Signed-off-by: Finley Xiao Reviewed-by: Heiko Stuebner --- drivers/clk/clk-composite.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c index 1f903e1f8..4d4b5ab 100644 --- a/drivers/clk/clk-composite.c +++ b/drivers/clk/clk-composite.c @@ -151,6 +151,33 @@ static int clk_composite_set_rate(struct clk_hw *hw, unsigned long rate, return rate_ops->set_rate(rate_hw, rate, parent_rate); } +static int clk_composite_set_rate_and_parent(struct clk_hw *hw, + unsigned long rate, + unsigned long parent_rate, + u8 index) +{ + struct clk_composite *composite = to_clk_composite(hw); + const struct clk_ops *rate_ops = composite->rate_ops; + const struct clk_ops *mux_ops = composite->mux_ops; + struct clk_hw *rate_hw = composite->rate_hw; + struct clk_hw *mux_hw = composite->mux_hw; + unsigned long temp_rate; + + __clk_hw_set_clk(rate_hw, hw); + __clk_hw_set_clk(mux_hw, hw); + + temp_rate = rate_ops->recalc_rate(rate_hw, parent_rate); + if (temp_rate > rate) { + rate_ops->set_rate(rate_hw, rate, parent_rate); + mux_ops->set_parent(mux_hw, index); + } else { + mux_ops->set_parent(mux_hw, index); + rate_ops->set_rate(rate_hw, rate, parent_rate); + } + + return 0; +} + static int clk_composite_is_enabled(struct clk_hw *hw) { struct clk_composite *composite = to_clk_composite(hw); @@ -250,6 +277,12 @@ struct clk *clk_register_composite(struct device *dev, const char *name, composite->rate_ops = rate_ops; } + if (mux_hw && mux_ops && rate_hw && rate_ops) { + if (mux_ops->set_parent && rate_ops->set_rate) + clk_composite_ops->set_rate_and_parent = + clk_composite_set_rate_and_parent; + } + if (gate_hw && gate_ops) { if (!gate_ops->is_enabled || !gate_ops->enable || !gate_ops->disable) {