| Message ID | 1462496564-76530-1-git-send-email-computersforpeace@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Am Donnerstag, 5. Mai 2016, 18:02:44 schrieb Brian Norris: > This is a standard binding for describing SPI flash that can be > identified by reading their JEDEC ID. Let's use it. > > Tested on Veyron Jaq. > > Signed-off-by: Brian Norris <computersforpeace@gmail.com> I've adapted the subject to ARM: dts: rockchip: add SPI flash node for rk3288-veyron and applied the patch to a temporary dts32-branch for 4.8 Thanks Heiko
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi index 412809c60d01..28f8ba8ae500 100644 --- a/arch/arm/boot/dts/rk3288-veyron.dtsi +++ b/arch/arm/boot/dts/rk3288-veyron.dtsi @@ -369,6 +369,12 @@ status = "okay"; rx-sample-delay-ns = <12>; + + flash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <50000000>; + reg = <0>; + }; }; &tsadc {
This is a standard binding for describing SPI flash that can be identified by reading their JEDEC ID. Let's use it. Tested on Veyron Jaq. Signed-off-by: Brian Norris <computersforpeace@gmail.com> --- arch/arm/boot/dts/rk3288-veyron.dtsi | 6 ++++++ 1 file changed, 6 insertions(+)