From patchwork Mon Jun 20 17:56:49 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 9188379 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 73CE6607D1 for ; Mon, 20 Jun 2016 18:02:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 69CB22780C for ; Mon, 20 Jun 2016 18:02:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5E63327C2C; Mon, 20 Jun 2016 18:02:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 11BC12780C for ; Mon, 20 Jun 2016 18:02:22 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bF3Wf-0008Ji-08; Mon, 20 Jun 2016 18:02:21 +0000 Received: from merlin.infradead.org ([2001:4978:20e::2]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bF3Vb-0007LA-Hv for linux-rockchip@bombadil.infradead.org; Mon, 20 Jun 2016 18:01:15 +0000 Received: from mail-pf0-x230.google.com ([2607:f8b0:400e:c00::230]) by merlin.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bF3VZ-0001qY-Kl for linux-rockchip@lists.infradead.org; Mon, 20 Jun 2016 18:01:14 +0000 Received: by mail-pf0-x230.google.com with SMTP id i123so52569612pfg.0 for ; Mon, 20 Jun 2016 11:00:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ap8C1YE9ACbQLrn/VIl/umq56cpRNHWFTM2op5N88ps=; b=mdqO0Fxr7g9IXprGtRLJAF5nYojEqS7NDXYsD70yrZnA7dU41rAhCuf4LrFEIxjJz5 NZ3zrcoaYt2V35XekxFDTYdBCmhbXCAPaH2FTyLF+DIvp9QIkzw204gW08x6LjTFycfF Le+P5c6WpadQ57lwZL+ElWwxY5db1jjMNBeNM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ap8C1YE9ACbQLrn/VIl/umq56cpRNHWFTM2op5N88ps=; b=MK0sHH0SwdGArlXbJtRIl7CkA70SLeeExFgsuV+Lk0yFEd2nwxRgMOPoTOp7XvLugO sIwy4S5TtBJS8qm7aoleMYBdEm2cOROwEcITjtbujFjsviNko+ZA4lnWgHpj0i4g5wOt vP9hxwfRHJQMjAbKX9/XGTF4FhXYIWhLPBq9MOlf8V58OzhQKhJbgCLIwO/Po98ZQSSM AI4z4MI35lLK9dtgp8BZ3YOw0JOZT/T5QW9KixBAcJMfE73/53w/Ai2L6AM6KNx1RRtj Ok/sf9vC2tDy1jwDEtmUlEkuGYEaP3hRZSBdD0IzzzuQfiOl5EHviYgFSog8cq6EhmU9 24dw== X-Gm-Message-State: ALyK8tKBl1pjZYz9He7yLX0zlXNdCOEKH7qSovAG278DDP6mUV+1dd0T7Pm+7Dgk2kxm8Iof X-Received: by 10.98.1.84 with SMTP id 81mr23473247pfb.155.1466445649516; Mon, 20 Jun 2016 11:00:49 -0700 (PDT) Received: from tictac.mtv.corp.google.com ([172.22.65.76]) by smtp.gmail.com with ESMTPSA id c189sm60250353pfg.19.2016.06.20.11.00.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 20 Jun 2016 11:00:48 -0700 (PDT) From: Douglas Anderson To: ulf.hansson@linaro.org, Heiko Stuebner Subject: [PATCH v3 10/15] Documentation: mmc: sdhci-of-arasan: Add ability to export card clock Date: Mon, 20 Jun 2016 10:56:49 -0700 Message-Id: <1466445414-11974-11-git-send-email-dianders@chromium.org> X-Mailer: git-send-email 2.8.0.rc3.226.g39d4020 In-Reply-To: <1466445414-11974-1-git-send-email-dianders@chromium.org> References: <1466445414-11974-1-git-send-email-dianders@chromium.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160620_140113_769897_C4090D06 X-CRM114-Status: GOOD ( 11.47 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Douglas Anderson , devicetree@vger.kernel.org, xzy.xu@rock-chips.com, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, linux-kernel@vger.kernel.org, shawn.lin@rock-chips.com, briannorris@chromium.org, linux-mmc@vger.kernel.org, adrian.hunter@intel.com, kishon@ti.com, linux-rockchip@lists.infradead.org, robh+dt@kernel.org, galak@codeaurora.org, groeck@chromium.org, mark.rutland@arm.com MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Some SD/eMMC PHYs (like the PHY from Arasan that is designed to work with arasan,sdhci-5.1) need to know the card clock frequency in order to function properly. Physically in a SoC this clock is exported from the SDHCI IP block to the PHY IP block and the PHY needs to know the speed. Let's export the SDHCI card clock using a standard device tree mechanism so that the PHY can get access to it and query the card clock frequency. Signed-off-by: Douglas Anderson Acked-by: Rob Herring Reviewed-by: Heiko Stuebner --- Changes in v3: - Add collected tags Changes in v2: - Adjust commit message wording (Rob) - Add Rob Herring's Ack. Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt index 476604e6ce2a..3404afa9b938 100644 --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt @@ -30,6 +30,12 @@ Optional Properties: - arasan,soc-ctl-syscon: A phandle to a syscon device (see ../mfd/syscon.txt) used to access core corecfg registers. Offsets of registers in this syscon are determined based on the main compatible string for the device. + - clock-output-names: If specified, this will be the name of the card clock + which will be exposed by this device. Required if #clock-cells is + specified. + - #clock-cells: If specified this should be the value <0>. With this property + in place we will export a clock representing the Card Clock. This clock + is expected to be consumed by our PHY. You must also specify Example: sdhci@e0100000 { @@ -61,7 +67,9 @@ Example: arasan,soc-ctl-syscon = <&grf>; assigned-clocks = <&cru SCLK_EMMC>; assigned-clock-rates = <200000000>; + clock-output-names = "emmc_cardclock"; phys = <&emmc_phy>; phy-names = "phy_arasan"; + #clock-cells = <0>; status = "disabled"; };