From patchwork Mon Jun 20 17:56:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 9188369 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 585D9607D1 for ; Mon, 20 Jun 2016 18:01:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4BEBB2780C for ; Mon, 20 Jun 2016 18:01:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3E57127C14; Mon, 20 Jun 2016 18:01:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C000C2780C for ; Mon, 20 Jun 2016 18:01:36 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bF3Vw-0007Zg-8x; Mon, 20 Jun 2016 18:01:36 +0000 Received: from mail-pf0-x231.google.com ([2607:f8b0:400e:c00::231]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bF3VL-0007Bn-E7 for linux-rockchip@lists.infradead.org; Mon, 20 Jun 2016 18:01:00 +0000 Received: by mail-pf0-x231.google.com with SMTP id h14so41117495pfe.1 for ; Mon, 20 Jun 2016 11:00:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=AoNbnEnKEU8pfUaTEs2Uk4GVs52M/rHDkcZlYoiznrg=; b=ARcvCSu2SGIOhnH+jUzeGgEK2yGu1Q3+H1rqiWQi+b7R/bpnhtMuoxKS3Jz8h3cWlP /6DfYN7eSijUbd3ztJOn1PqEBox3BGP9yYXud1kYltHi4YiWFrjCD8qW8wcj0f4nqgZq 0fwcL8B8J2qG/oeGlaOU/z7YxcK/BAkawfpWE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=AoNbnEnKEU8pfUaTEs2Uk4GVs52M/rHDkcZlYoiznrg=; b=is+6QSya1NPcO8PfPnnzEyE0kYHxoHm+QtQFRlOsEPKud8Rn3Z2Z47LROhpfON4lFc tYc1oooWsxCAgxItVsXxVY6CCLWtDJr9tgV4OXE+42tR3R92p+VYUQllDX7ZtyExKbWP kmr8tM3NVK1DuRZMcimMIr951BscXLP9d2Bq0XHu81oizzKd2N0+Jc/72TSunsuIyKqq 3pv2bvH7LqVyYrZaYQjtpErcva9bWTvhEDxMtqr/7yh36vkeNxYfGxEnamQW1yrHE/Bo J4NL1WzPii5F9lEjm6Npl8DG8Hs0jQo1Diegw2ZFmIZAkzTN1OQPGBj0yW94I0vb8/fv vREA== X-Gm-Message-State: ALyK8tIWq/6SoVbN53NuqnPmfrAeEDTK8R/LJLnvEGylW0l4/iJdg2pZWhxzpDdboSG74Uux X-Received: by 10.98.80.79 with SMTP id e76mr23511912pfb.67.1466445634171; Mon, 20 Jun 2016 11:00:34 -0700 (PDT) Received: from tictac.mtv.corp.google.com ([172.22.65.76]) by smtp.gmail.com with ESMTPSA id c189sm60250353pfg.19.2016.06.20.11.00.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 20 Jun 2016 11:00:33 -0700 (PDT) From: Douglas Anderson To: ulf.hansson@linaro.org, Heiko Stuebner Subject: [PATCH v3 02/15] phy: rockchip-emmc: configure frequency range and drive impedance Date: Mon, 20 Jun 2016 10:56:41 -0700 Message-Id: <1466445414-11974-3-git-send-email-dianders@chromium.org> X-Mailer: git-send-email 2.8.0.rc3.226.g39d4020 In-Reply-To: <1466445414-11974-1-git-send-email-dianders@chromium.org> References: <1466445414-11974-1-git-send-email-dianders@chromium.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160620_110059_655220_B8C84EF1 X-CRM114-Status: GOOD ( 10.17 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Douglas Anderson , devicetree@vger.kernel.org, xzy.xu@rock-chips.com, linux-kernel@vger.kernel.org, shawn.lin@rock-chips.com, briannorris@chromium.org, linux-mmc@vger.kernel.org, adrian.hunter@intel.com, kishon@ti.com, linux-rockchip@lists.infradead.org, robh+dt@kernel.org, groeck@chromium.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Shawn Lin Signal integrity analysis has suggested we set these values. Do this in power_on(), so that they get reconfigured after suspend/resume. Signed-off-by: Shawn Lin Signed-off-by: Brian Norris Signed-off-by: Douglas Anderson Acked-by: Kishon Vijay Abraham I Tested-by: Heiko Stuebner --- Changes in v3: - Add Brian's PHY patches into my series Changes in v2: - Drop 170 MHz comment (only applicable to a subtly different Arasan PHY) drivers/phy/phy-rockchip-emmc.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/phy/phy-rockchip-emmc.c b/drivers/phy/phy-rockchip-emmc.c index 48cbe691a889..f2f75cf69af1 100644 --- a/drivers/phy/phy-rockchip-emmc.c +++ b/drivers/phy/phy-rockchip-emmc.c @@ -56,6 +56,19 @@ #define PHYCTRL_DLLRDY_SHIFT 0x5 #define PHYCTRL_DLLRDY_DONE 0x1 #define PHYCTRL_DLLRDY_GOING 0x0 +#define PHYCTRL_FREQSEL_200M 0x0 +#define PHYCTRL_FREQSEL_50M 0x1 +#define PHYCTRL_FREQSEL_100M 0x2 +#define PHYCTRL_FREQSEL_150M 0x3 +#define PHYCTRL_FREQSEL_MASK 0x3 +#define PHYCTRL_FREQSEL_SHIFT 0xc +#define PHYCTRL_DR_MASK 0x7 +#define PHYCTRL_DR_SHIFT 0x4 +#define PHYCTRL_DR_50OHM 0x0 +#define PHYCTRL_DR_33OHM 0x1 +#define PHYCTRL_DR_66OHM 0x2 +#define PHYCTRL_DR_100OHM 0x3 +#define PHYCTRL_DR_40OHM 0x4 struct rockchip_emmc_phy { unsigned int reg_offset; @@ -154,6 +167,20 @@ static int rockchip_emmc_phy_power_on(struct phy *phy) struct rockchip_emmc_phy *rk_phy = phy_get_drvdata(phy); int ret = 0; + /* DLL operation: 200 MHz */ + regmap_write(rk_phy->reg_base, + rk_phy->reg_offset + GRF_EMMCPHY_CON0, + HIWORD_UPDATE(PHYCTRL_FREQSEL_200M, + PHYCTRL_FREQSEL_MASK, + PHYCTRL_FREQSEL_SHIFT)); + + /* Drive impedance: 50 Ohm */ + regmap_write(rk_phy->reg_base, + rk_phy->reg_offset + GRF_EMMCPHY_CON6, + HIWORD_UPDATE(PHYCTRL_DR_50OHM, + PHYCTRL_DR_MASK, + PHYCTRL_DR_SHIFT)); + /* Power up emmc phy analog blocks */ ret = rockchip_emmc_phy_power(rk_phy, PHYCTRL_PDB_PWR_ON); if (ret)