From patchwork Sat Oct 22 19:18:53 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ayaka X-Patchwork-Id: 9390851 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 85152600CB for ; Sat, 22 Oct 2016 19:19:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6FA6528E79 for ; Sat, 22 Oct 2016 19:19:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 62CDA28EAD; Sat, 22 Oct 2016 19:19:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2608E28E79 for ; Sat, 22 Oct 2016 19:19:56 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1by1pi-0003MD-2J; Sat, 22 Oct 2016 19:19:54 +0000 Received: from kozue.soulik.info ([2001:19f0:7000:8404:5054:ff:fe75:428f]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1by1pR-0003IW-My; Sat, 22 Oct 2016 19:19:39 +0000 Received: from ritsuko.sumomo.pri (ritsuko.soulik.info [IPv6:2001:470:b30d:2:210:18ff:fe06:921]) by kozue.soulik.info (Postfix) with ESMTPA id 12F7C102878; Sun, 23 Oct 2016 04:19:38 +0900 (JST) From: Randy Li To: dri-devel@lists.freedesktop.org Subject: [PATCH] drm/rockchip: analogix_dp: add supports for regulators in edp IP Date: Sun, 23 Oct 2016 03:18:53 +0800 Message-Id: <1477163933-13140-1-git-send-email-ayaka@soulik.info> X-Mailer: git-send-email 2.7.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161022_121937_924370_18563EA4 X-CRM114-Status: UNSURE ( 9.64 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: heiko@sntech.de, airlied@linux.ie, Randy Li , randy.li@rock-chips.com, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, mark.yao@rock-chips.com MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP I found if eDP_AVDD_1V0 and eDP_AVDD_1V8 are not been power at RK3288, once trying to enable the pclk clock, the kernel would dead. This patch would try to enable them first. The eDP_AVDD_1V8 more likely to be applied to eDP phy, but I have no time to confirmed it yet. Signed-off-by: Randy Li --- drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c index 8548e82..6bf0441 100644 --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -70,6 +71,7 @@ struct rockchip_dp_device { struct clk *grfclk; struct regmap *grf; struct reset_control *rst; + struct regulator_bulk_data supplies[2]; struct work_struct psr_work; spinlock_t psr_lock; @@ -146,6 +148,13 @@ static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data) cancel_work_sync(&dp->psr_work); + ret = regulator_bulk_enable(ARRAY_SIZE(dp->supplies), + dp->supplies); + if (ret) { + dev_err(dp->dev, "failed to enable vdd supply %d\n", ret); + return ret; + } + ret = clk_prepare_enable(dp->pclk); if (ret < 0) { dev_err(dp->dev, "failed to enable pclk %d\n", ret); @@ -168,6 +177,9 @@ static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data) clk_disable_unprepare(dp->pclk); + regulator_bulk_disable(ARRAY_SIZE(dp->supplies), + dp->supplies); + return 0; } @@ -323,6 +335,19 @@ static int rockchip_dp_init(struct rockchip_dp_device *dp) return PTR_ERR(dp->rst); } + dp->supplies[0].supply = "vcc"; + dp->supplies[1].supply = "vccio"; + ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(dp->supplies), + dp->supplies); + if (ret < 0) { + dev_err(dev, "failed to get regulators: %d\n", ret); + } + ret = regulator_bulk_enable(ARRAY_SIZE(dp->supplies), + dp->supplies); + if (ret < 0) { + dev_err(dev, "failed to enable regulators: %d\n", ret); + } + ret = clk_prepare_enable(dp->pclk); if (ret < 0) { dev_err(dp->dev, "failed to enable pclk %d\n", ret);