From patchwork Tue Nov 15 03:54:06 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: wuliangfeng X-Patchwork-Id: 9428881 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id AE59660469 for ; Tue, 15 Nov 2016 03:56:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 928762835D for ; Tue, 15 Nov 2016 03:56:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3C77328B59; Tue, 15 Nov 2016 03:56:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.7 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RCVD_IN_SORBS_SPAM autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A420C2835D for ; Tue, 15 Nov 2016 03:56:47 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1c6UrW-0001Ob-U2; Tue, 15 Nov 2016 03:56:46 +0000 Received: from merlin.infradead.org ([2001:4978:20e::2]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1c6Uqc-0000mU-1P; Tue, 15 Nov 2016 03:55:50 +0000 Received: from regular1.263xmail.com ([211.150.99.137]) by merlin.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1c6UqZ-0005JE-JK; Tue, 15 Nov 2016 03:55:49 +0000 Received: from wulf?rock-chips.com (unknown [192.168.167.154]) by regular1.263xmail.com (Postfix) with ESMTP id 2F35FDC17; Tue, 15 Nov 2016 11:55:18 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id 7CBFF378; Tue, 15 Nov 2016 11:55:16 +0800 (CST) X-RL-SENDER: wulf@rock-chips.com X-FST-TO: kishon@ti.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: wulf@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-SENDER: wulf@rock-chips.com X-DNS-TYPE: 0 Received: from unknown (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith SMTP id 5399DSHM2F; Tue, 15 Nov 2016 11:55:18 +0800 (CST) From: William Wu To: kishon@ti.com, heiko@sntech.de Subject: [PATCH v4 1/2] phy: rockchip-inno-usb2: correct clk_ops callback Date: Tue, 15 Nov 2016 11:54:06 +0800 Message-Id: <1479182047-3399-2-git-send-email-wulf@rock-chips.com> X-Mailer: git-send-email 2.0.0 In-Reply-To: <1479182047-3399-1-git-send-email-wulf@rock-chips.com> References: <1479182047-3399-1-git-send-email-wulf@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161114_225548_128347_1BA94896 X-CRM114-Status: UNSURE ( 8.45 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangtao@rock-chips.com, devicetree@vger.kernel.org, groeck@google.com, frank.wang@rock-chips.com, linux-kernel@vger.kernel.org, dianders@google.com, linux-rockchip@lists.infradead.org, robh+dt@kernel.org, wulf@rock-chips.com, briannorris@google.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Since we needs to delay ~1ms to wait for 480MHz output clock of USB2 PHY to become stable after turn on it, the delay time is pretty long for something that's supposed to be "atomic" like a clk_enable(). Consider that clk_enable() will disable interrupt and that a 1ms interrupt latency is not sensible. The 480MHz output clock should be handled in prepare callbacks which support gate a clk if the operation may sleep. Signed-off-by: William Wu Reviewed-by: Douglas Anderson --- Changes in v4: - add Reviewed-by Changes in v3: - None Changes in v2: - None drivers/phy/phy-rockchip-inno-usb2.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c index ac20310..365e077 100644 --- a/drivers/phy/phy-rockchip-inno-usb2.c +++ b/drivers/phy/phy-rockchip-inno-usb2.c @@ -153,7 +153,7 @@ static inline bool property_enabled(struct rockchip_usb2phy *rphy, return tmp == reg->enable; } -static int rockchip_usb2phy_clk480m_enable(struct clk_hw *hw) +static int rockchip_usb2phy_clk480m_prepare(struct clk_hw *hw) { struct rockchip_usb2phy *rphy = container_of(hw, struct rockchip_usb2phy, clk480m_hw); @@ -172,7 +172,7 @@ static int rockchip_usb2phy_clk480m_enable(struct clk_hw *hw) return 0; } -static void rockchip_usb2phy_clk480m_disable(struct clk_hw *hw) +static void rockchip_usb2phy_clk480m_unprepare(struct clk_hw *hw) { struct rockchip_usb2phy *rphy = container_of(hw, struct rockchip_usb2phy, clk480m_hw); @@ -181,7 +181,7 @@ static void rockchip_usb2phy_clk480m_disable(struct clk_hw *hw) property_enable(rphy, &rphy->phy_cfg->clkout_ctl, false); } -static int rockchip_usb2phy_clk480m_enabled(struct clk_hw *hw) +static int rockchip_usb2phy_clk480m_prepared(struct clk_hw *hw) { struct rockchip_usb2phy *rphy = container_of(hw, struct rockchip_usb2phy, clk480m_hw); @@ -197,9 +197,9 @@ rockchip_usb2phy_clk480m_recalc_rate(struct clk_hw *hw, } static const struct clk_ops rockchip_usb2phy_clkout_ops = { - .enable = rockchip_usb2phy_clk480m_enable, - .disable = rockchip_usb2phy_clk480m_disable, - .is_enabled = rockchip_usb2phy_clk480m_enabled, + .prepare = rockchip_usb2phy_clk480m_prepare, + .unprepare = rockchip_usb2phy_clk480m_unprepare, + .is_prepared = rockchip_usb2phy_clk480m_prepared, .recalc_rate = rockchip_usb2phy_clk480m_recalc_rate, };