From patchwork Wed Apr 19 09:00:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Lin X-Patchwork-Id: 9687057 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6E52A6038D for ; Wed, 19 Apr 2017 09:01:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5FCAB205FB for ; Wed, 19 Apr 2017 09:01:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 54B7126E75; Wed, 19 Apr 2017 09:01:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,URIBL_BLACK autolearn=no version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E3A70280B0 for ; Wed, 19 Apr 2017 09:01:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=iMVvHnPhVtuL7T3Sv7/H3ddilcw4iFllv2vyxrIun9o=; b=sMVlvHrw1QqFGCRd5jthnpJdRl UcXweYJsuseldr7Cr0FXwTNNjTsHNX8cKRyHxj7DZiJb+SeLc97/h8kOEaAS33n+Gf3OvctqsL2uU DCnEoSTWzYFqj/hd/Zx+f0D3+EkNCescz9Wnsql15v/nCn+DP6NrwvKK2N2SwDdZz57/Ch0xbbC7G ZCMCQadGHwIpQxwYma8pGWavZV+FfvWjn4ldTFS7WxrW1xUzV0VWKNPdjurP7eUwsDfM/UoR0wKzC 1+1110M9LMm0T4EMeLCXjwOIrrRguBw78YGyePkn1RsUHOrtaM4GXUQWkbDKDpR8d9EASKNirTA+C 0gQ1szWw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1d0lUd-0003uh-LG; Wed, 19 Apr 2017 09:01:43 +0000 Received: from lucky1.263xmail.com ([211.157.147.131]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1d0lUa-0003oc-EG for linux-rockchip@lists.infradead.org; Wed, 19 Apr 2017 09:01:42 +0000 Received: from shawn.lin?rock-chips.com (unknown [192.168.167.11]) by lucky1.263xmail.com (Postfix) with ESMTP id 54B138F777; Wed, 19 Apr 2017 17:01:13 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id 922863DD; Wed, 19 Apr 2017 17:01:12 +0800 (CST) X-RL-SENDER: shawn.lin@rock-chips.com X-FST-TO: jh80.chung@samsung.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: shawn.lin@rock-chips.com X-UNIQUE-TAG: <661d675b646fb65a9524fa1e1ec72e7a> X-ATTACHMENT-NUM: 0 X-SENDER: lintao@rock-chips.com X-DNS-TYPE: 0 Received: from unknown (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith SMTP id 2029OBQ85B; Wed, 19 Apr 2017 17:01:14 +0800 (CST) From: Shawn Lin To: Jaehoon Chung , Ulf Hansson Subject: [PATCH 2/2] mmc: dw_mmc-rockchip: parse rockchip, default-num-phases from DT Date: Wed, 19 Apr 2017 17:00:34 +0800 Message-Id: <1492592434-81312-3-git-send-email-shawn.lin@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1492592434-81312-1-git-send-email-shawn.lin@rock-chips.com> References: <1492592434-81312-1-git-send-email-shawn.lin@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170419_020140_982701_BE0BAE33 X-CRM114-Status: GOOD ( 16.36 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Shawn Lin , Ziyuan Xu , linux-mmc@vger.kernel.org, Doug Anderson , linux-rockchip@lists.infradead.org, Rob Herring MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Currently we unconditionally do tuning for each degree, which costs 900ms for each boot and resume. May someone argue that this is a question of accuracy VS time. But I would say it's a trick of how we need to do decision for our boards. If we don't care the time we spend at all, we could definitely do tuning for each degree. But when we need to improve the user experience, for instance, speed up resuming from S3, we should also have the right to do that. This patch add parsing "rockchip,default-num-phases", for folks to specify the number of doing tuning. If not specified, 360 will be used as before. Signed-off-by: Shawn Lin --- drivers/mmc/host/dw_mmc-rockchip.c | 48 ++++++++++++++++++++++++-------------- 1 file changed, 30 insertions(+), 18 deletions(-) diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c index 372fb6e..c535526 100644 --- a/drivers/mmc/host/dw_mmc-rockchip.c +++ b/drivers/mmc/host/dw_mmc-rockchip.c @@ -25,6 +25,7 @@ struct dw_mci_rockchip_priv_data { struct clk *drv_clk; struct clk *sample_clk; int default_sample_phase; + int num_phases; }; static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) @@ -133,8 +134,8 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) } } -#define NUM_PHASES 360 -#define TUNING_ITERATION_TO_PHASE(i) (DIV_ROUND_UP((i) * 360, NUM_PHASES)) +#define TUNING_ITERATION_TO_PHASE(i, num_phases) \ + (DIV_ROUND_UP((i) * 360, num_phases)) static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) { @@ -159,13 +160,15 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) return -EIO; } - ranges = kmalloc_array(NUM_PHASES / 2 + 1, sizeof(*ranges), GFP_KERNEL); + ranges = kmalloc_array(priv->num_phases / 2 + 1, + sizeof(*ranges), GFP_KERNEL); if (!ranges) return -ENOMEM; /* Try each phase and extract good ranges */ - for (i = 0; i < NUM_PHASES; ) { - clk_set_phase(priv->sample_clk, TUNING_ITERATION_TO_PHASE(i)); + for (i = 0; i < priv->num_phases; ) { + clk_set_phase(priv->sample_clk, + TUNING_ITERATION_TO_PHASE(i, priv->num_phases)); v = !mmc_send_tuning(mmc, opcode, NULL); @@ -179,7 +182,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) if (v) { ranges[range_count-1].end = i; i++; - } else if (i == NUM_PHASES - 1) { + } else if (i == priv->num_phases - 1) { /* No extra skipping rules if we're at the end */ i++; } else { @@ -188,11 +191,11 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) * one since testing bad phases is slow. Skip * 20 degrees. */ - i += DIV_ROUND_UP(20 * NUM_PHASES, 360); + i += DIV_ROUND_UP(20 * priv->num_phases, 360); /* Always test the last one */ - if (i >= NUM_PHASES) - i = NUM_PHASES - 1; + if (i >= priv->num_phases) + i = priv->num_phases - 1; } prev_v = v; @@ -210,7 +213,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) range_count--; } - if (ranges[0].start == 0 && ranges[0].end == NUM_PHASES - 1) { + if (ranges[0].start == 0 && ranges[0].end == priv->num_phases - 1) { clk_set_phase(priv->sample_clk, priv->default_sample_phase); dev_info(host->dev, "All phases work, using default phase %d.", priv->default_sample_phase); @@ -222,7 +225,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) int len = (ranges[i].end - ranges[i].start + 1); if (len < 0) - len += NUM_PHASES; + len += priv->num_phases; if (longest_range_len < len) { longest_range_len = len; @@ -230,25 +233,30 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) } dev_dbg(host->dev, "Good phase range %d-%d (%d len)\n", - TUNING_ITERATION_TO_PHASE(ranges[i].start), - TUNING_ITERATION_TO_PHASE(ranges[i].end), + TUNING_ITERATION_TO_PHASE(ranges[i].start, + priv->num_phases), + TUNING_ITERATION_TO_PHASE(ranges[i].end, + priv->num_phases), len ); } dev_dbg(host->dev, "Best phase range %d-%d (%d len)\n", - TUNING_ITERATION_TO_PHASE(ranges[longest_range].start), - TUNING_ITERATION_TO_PHASE(ranges[longest_range].end), + TUNING_ITERATION_TO_PHASE(ranges[longest_range].start, + priv->num_phases), + TUNING_ITERATION_TO_PHASE(ranges[longest_range].end, + priv->num_phases), longest_range_len ); middle_phase = ranges[longest_range].start + longest_range_len / 2; - middle_phase %= NUM_PHASES; + middle_phase %= priv->num_phases; dev_info(host->dev, "Successfully tuned phase to %d\n", - TUNING_ITERATION_TO_PHASE(middle_phase)); + TUNING_ITERATION_TO_PHASE(middle_phase, priv->num_phases)); clk_set_phase(priv->sample_clk, - TUNING_ITERATION_TO_PHASE(middle_phase)); + TUNING_ITERATION_TO_PHASE(middle_phase, + priv->num_phases)); free: kfree(ranges); @@ -264,6 +272,10 @@ static int dw_mci_rk3288_parse_dt(struct dw_mci *host) if (!priv) return -ENOMEM; + if (of_property_read_u32(np, "rockchip,default-num-phases", + &priv->num_phases)) + priv->num_phases = 360; + if (of_property_read_u32(np, "rockchip,default-sample-phase", &priv->default_sample_phase)) priv->default_sample_phase = 0;