From patchwork Thu May 25 13:12:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Wu X-Patchwork-Id: 9748375 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0EEDB6032C for ; Thu, 25 May 2017 13:10:23 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F1EF62835B for ; Thu, 25 May 2017 13:10:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E187C28396; Thu, 25 May 2017 13:10:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 838A82833C for ; Thu, 25 May 2017 13:10:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=JzFNegKtxXjUjVMhhPlEjyA79TyktaM9B6slScmWcbM=; b=EfYIzuy9V6AI8dPNfJXHdvdXPW RYMkxkYqt6nUUg8+HZAvoB+6/U7ocDs8bxNTrFt6YJ+VvPIkW6Smexr2P/b35MtS/RGpNMtyPxq7l epoe4+rqAXERIegZr7ud9KqUqwSX8I6N6GcsULW/q/x4F4nDnpU6wqn9a2PoDK0/g/sDa9zkJpYg/ Mb54Kp60nnhUlfjZbK9W0CaRwsMZ+3B0wWphHJuvrFNSlAQSOmjqJm0PdLgVfWcqmJZ+jwBV4w69t MPB2UVY4nPM11bGhsA8Qg3mAhEnsjyKO7ypWc765tU96qI/OmPyEM77oNHMjmAfyTnqa/76lXB4FV 7KLT6xSQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dDsX0-0001nw-5B; Thu, 25 May 2017 13:10:22 +0000 Received: from ca-mx01.263.net ([50.18.194.75] helo=smtphy.263.net) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dDsWj-0000Mi-Hi for linux-rockchip@lists.infradead.org; Thu, 25 May 2017 13:10:19 +0000 Received: from transport.263xmail.com (unknown [38.83.106.156]) by smtphy.263.net (Postfix) with ESMTPS id 9C5A39FE0F for ; Thu, 25 May 2017 21:09:44 +0800 (CST) Received: from lucky1.263xmail.com (unknown [192.168.165.181]) by transportlucky.263xmail.com (Postfix) with ESMTP id A8C773FEB for ; Thu, 25 May 2017 21:09:39 +0800 (CST) Received: from david.wu?rock-chips.com (unknown [192.168.167.140]) by lucky1.263xmail.com (Postfix) with ESMTP id 1C8BC64591; Thu, 25 May 2017 21:09:24 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id B0E20323; Thu, 25 May 2017 21:09:24 +0800 (CST) X-RL-SENDER: david.wu@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: david.wu@rock-chips.com X-UNIQUE-TAG: <1d6486b1df82f3d2fe6c66b05c3c9110> X-ATTACHMENT-NUM: 0 X-SENDER: wdc@rock-chips.com X-DNS-TYPE: 0 Received: from unknown (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith SMTP id 18432CHXKBM; Thu, 25 May 2017 21:09:25 +0800 (CST) From: David Wu To: heiko@sntech.de, linus.walleij@linaro.org Subject: [PATCH 1/4] pinctrl: rockchip: Add iomux-route switching support Date: Thu, 25 May 2017 21:12:29 +0800 Message-Id: <1495717952-9762-2-git-send-email-david.wu@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1495717952-9762-1-git-send-email-david.wu@rock-chips.com> References: <1495717952-9762-1-git-send-email-david.wu@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170525_061005_785351_1723D149 X-CRM114-Status: GOOD ( 12.91 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangtao@rock-chips.com, linux-gpio@vger.kernel.org, dianders@chromium.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, David Wu MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP On the some rockchip soc, some things like one specific uart can use multiple pins, but control of that seems to be split. Somewhere between the pin io-cells and the uart it seems to have some sort of switch to decide to which pin to actually route the data. +-------+ +--------+ /- GPIO4_B0 (pinmux 2) | uart2 | -- | switch | --- GPIO4_C0 (pinmux 2) +-------+ +--------+ \- GPIO4_C3 (pinmux 2) (switch selects one of the 3 pins base on the GRF_SOC_CON7[BIT0, BIT1]) The routing switch is determined by one pin of a specific group to be set to its special pinmux function. If the pinmux setting is wrong for that pin the ip block won't work correctly anyway. Signed-off-by: David Wu --- drivers/pinctrl/pinctrl-rockchip.c | 31 ++++++++++++++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index f141aa0..f5dd1c3 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -146,6 +146,7 @@ struct rockchip_drv { * @irq_lock: bus lock for irq chip * @new_irqs: newly configured irqs which must be muxed as GPIOs in * irq_bus_sync_unlock() + * @route_mask: bits describing the routing pins of per bank */ struct rockchip_pin_bank { void __iomem *reg_base; @@ -170,6 +171,7 @@ struct rockchip_pin_bank { u32 toggle_edge_mode; struct mutex irq_lock; u32 new_irqs; + u32 route_mask; }; #define PIN_BANK(id, pins, label) \ @@ -316,6 +318,8 @@ struct rockchip_pin_ctrl { int (*schmitt_calc_reg)(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit); + bool (*iomux_route)(u8 bank_num, int pin, int mux, + u32 *reg, u32 *value); }; struct rockchip_pin_config { @@ -383,6 +387,22 @@ struct rockchip_mux_recalced_data { u8 mask; }; +/** + * struct rockchip_mux_recalced_data: represent a pin iomux data. + * @bank: bank number. + * @pin: index at register or used to calc index. + * @func: the min pin. + * @route_offset: the max pin. + * @route_val: the register offset. + */ +struct rockchip_mux_route_data { + u8 bank; + u8 pin; + u8 func; + u32 route_offset; + u32 route_val; +}; + static struct regmap_config rockchip_regmap_config = { .reg_bits = 32, .val_bits = 32, @@ -683,7 +703,7 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux) struct regmap *regmap; int reg, ret, mask, mux_type; u8 bit; - u32 data, rmask; + u32 data, rmask, route_reg, route_val; ret = rockchip_verify_mux(bank, pin, mux); if (ret < 0) @@ -719,6 +739,15 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux) if (ctrl->iomux_recalc && (mux_type & IOMUX_RECALCED)) ctrl->iomux_recalc(bank->bank_num, pin, ®, &bit, &mask); + if (ctrl->iomux_route && (bank->route_mask & BIT(pin))) { + if (ctrl->iomux_route(bank->bank_num, pin, mux, + &route_reg, &route_val)) { + ret = regmap_write(regmap, route_reg, route_val); + if (ret) + return ret; + } + } + data = (mask << (bit + 16)); rmask = data | (data >> 16); data |= (mux & mask) << bit;