From patchwork Thu May 25 13:12:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Wu X-Patchwork-Id: 9748373 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 823166032C for ; Thu, 25 May 2017 13:10:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6739D2833C for ; Thu, 25 May 2017 13:10:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5BFE4282E8; Thu, 25 May 2017 13:10:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DCDDC282E8 for ; Thu, 25 May 2017 13:10:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=Yn1aCFmdk4snaHWG6dC30IJD0+Z4uTK0RBd1oex+xB0=; b=cP/YgniXflMFId613DAl/INYOX Q67hTZSQfO7r/JsuOj/ozBXS6O0QLjRidTpJuhLww55N71SOE3s0wlfussCFhfh0w51y43ngotP24 ZBPEb6luOc8CiQCi6/mDojNKVS2KKTiRv2FmxEU5wGyIAOGGxEAoleyLAtU0s74sE+BFKBp50jdbI VOHSBizDrH583Xdxe4ePIRIy2rU2ykg+CsuYzfDg5pWLdcR444meP3ZJnUcwQwh9+VK0B8fl965cj 2dJrpcIiagPFrhVEymEDfribfxsBn55+IzlV7NXXlBe3KXpJkzMpFztJmIIffzpjT0rEvxMqxKmx2 xo9ztL9g==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dDsWz-0001nK-Ds; Thu, 25 May 2017 13:10:21 +0000 Received: from ca-mx01.263.net ([50.18.194.75] helo=smtphy.263.net) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dDsWj-0000NM-HI for linux-rockchip@lists.infradead.org; Thu, 25 May 2017 13:10:19 +0000 Received: from transport.263xmail.com (unknown [38.83.106.156]) by smtphy.263.net (Postfix) with ESMTPS id 6E0369FE30 for ; Thu, 25 May 2017 21:09:47 +0800 (CST) Received: from lucky1.263xmail.com (unknown [192.168.165.181]) by transportlucky.263xmail.com (Postfix) with ESMTP id D2DEB43D6 for ; Thu, 25 May 2017 21:09:41 +0800 (CST) Received: from david.wu?rock-chips.com (unknown [192.168.167.140]) by lucky1.263xmail.com (Postfix) with ESMTP id 040156456E; Thu, 25 May 2017 21:09:29 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id D86C8323; Thu, 25 May 2017 21:09:29 +0800 (CST) X-RL-SENDER: david.wu@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: david.wu@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-SENDER: wdc@rock-chips.com X-DNS-TYPE: 0 Received: from unknown (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith SMTP id 18432HJXNAB; Thu, 25 May 2017 21:09:30 +0800 (CST) From: David Wu To: heiko@sntech.de, linus.walleij@linaro.org Subject: [PATCH 4/4] pinctrl: rockchip: Add iomux-route switching support for rk3399 Date: Thu, 25 May 2017 21:12:32 +0800 Message-Id: <1495717952-9762-5-git-send-email-david.wu@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1495717952-9762-1-git-send-email-david.wu@rock-chips.com> References: <1495717952-9762-1-git-send-email-david.wu@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170525_061005_827202_812320E6 X-CRM114-Status: GOOD ( 13.25 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangtao@rock-chips.com, linux-gpio@vger.kernel.org, dianders@chromium.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, David Wu MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP There are 2 IP blocks pin routes need to be switched, that are uart2dbg, pcie_clkreq. Signed-off-by: David Wu --- drivers/pinctrl/pinctrl-rockchip.c | 140 +++++++++++++++++++++++++++++++++---- 1 file changed, 126 insertions(+), 14 deletions(-) diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index 6eab4581..44c5aff3 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -248,6 +248,27 @@ struct rockchip_pin_bank { }, \ } +#define PIN_BANK_DRV_FLAGS_ROUTE(id, pins, label, route, type0, type1, \ + type2, type3) \ + { \ + .bank_num = id, \ + .nr_pins = pins, \ + .name = label, \ + .route_mask = route, \ + .iomux = { \ + { .offset = -1 }, \ + { .offset = -1 }, \ + { .offset = -1 }, \ + { .offset = -1 }, \ + }, \ + .drv = { \ + { .drv_type = type0, .offset = -1 }, \ + { .drv_type = type1, .offset = -1 }, \ + { .drv_type = type2, .offset = -1 }, \ + { .drv_type = type3, .offset = -1 }, \ + }, \ + } + #define PIN_BANK_DRV_FLAGS_PULL_FLAGS(id, pins, label, drv0, drv1, \ drv2, drv3, pull0, pull1, \ pull2, pull3) \ @@ -273,6 +294,32 @@ struct rockchip_pin_bank { .pull_type[3] = pull3, \ } +#define PIN_BANK_DRV_FLAGS_PULL_FLAGS_ROUTE(id, pins, label, route, \ + drv0, drv1, drv2, drv3, \ + pull0, pull1, pull2, pull3) \ + { \ + .bank_num = id, \ + .nr_pins = pins, \ + .name = label, \ + .route_mask = route, \ + .iomux = { \ + { .offset = -1 }, \ + { .offset = -1 }, \ + { .offset = -1 }, \ + { .offset = -1 }, \ + }, \ + .drv = { \ + { .drv_type = drv0, .offset = -1 }, \ + { .drv_type = drv1, .offset = -1 }, \ + { .drv_type = drv2, .offset = -1 }, \ + { .drv_type = drv3, .offset = -1 }, \ + }, \ + .pull_type[0] = pull0, \ + .pull_type[1] = pull1, \ + .pull_type[2] = pull2, \ + .pull_type[3] = pull3, \ + } + #define PIN_BANK_IOMUX_DRV_FLAGS_OFFSET(id, pins, label, iom0, iom1, \ iom2, iom3, drv0, drv1, drv2, \ drv3, offset0, offset1, \ @@ -891,6 +938,68 @@ static bool rk3328_set_mux_route(u8 bank_num, int pin, int mux, return true; } +static const struct rockchip_mux_route_data rk3399_mux_route_data[] = { + { + /* uart2dbga_rx */ + .bank = 4, + .pin = 8, + .func = 2, + .route_offset = 0xe21c, + .route_val = BIT(16 + 10) | BIT(16 + 11), + }, { + /* uart2dbgb_rx */ + .bank = 4, + .pin = 16, + .func = 2, + .route_offset = 0xe21c, + .route_val = BIT(16 + 10) | BIT(16 + 11) | BIT(10), + }, { + /* uart2dbgc_rx */ + .bank = 4, + .pin = 19, + .func = 1, + .route_offset = 0xe21c, + .route_val = BIT(16 + 10) | BIT(16 + 11) | BIT(11), + }, { + /* pcie_clkreqn */ + .bank = 2, + .pin = 26, + .func = 2, + .route_offset = 0xe21c, + .route_val = BIT(16 + 14), + }, { + /* pcie_clkreqnb */ + .bank = 4, + .pin = 24, + .func = 1, + .route_offset = 0xe21c, + .route_val = BIT(16 + 14) | BIT(14), + }, +}; + +static bool rk3399_set_mux_route(u8 bank_num, int pin, int mux, + u32 *reg, u32 *value) +{ + const struct rockchip_mux_route_data *data = NULL; + int i; + + for (i = 0; i < ARRAY_SIZE(rk3399_mux_route_data); i++) + if ((rk3399_mux_route_data[i].bank == bank_num) && + (rk3399_mux_route_data[i].pin == pin) && + (rk3399_mux_route_data[i].func == mux)) { + data = &rk3399_mux_route_data[i]; + break; + } + + if (!data) + return false; + + *reg = data->route_offset; + *value = data->route_val; + + return true; +} + static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin) { struct rockchip_pinctrl *info = bank->drvdata; @@ -3279,25 +3388,27 @@ static int rockchip_pinctrl_probe(struct platform_device *pdev) 0x30, 0x38 ), - PIN_BANK_DRV_FLAGS_PULL_FLAGS(2, 32, "gpio2", DRV_TYPE_IO_1V8_OR_3V0, - DRV_TYPE_IO_1V8_OR_3V0, - DRV_TYPE_IO_1V8_ONLY, - DRV_TYPE_IO_1V8_ONLY, - PULL_TYPE_IO_DEFAULT, - PULL_TYPE_IO_DEFAULT, - PULL_TYPE_IO_1V8_ONLY, - PULL_TYPE_IO_1V8_ONLY - ), + PIN_BANK_DRV_FLAGS_PULL_FLAGS_ROUTE(2, 32, "gpio2", 0x04000000, + DRV_TYPE_IO_1V8_OR_3V0, + DRV_TYPE_IO_1V8_OR_3V0, + DRV_TYPE_IO_1V8_ONLY, + DRV_TYPE_IO_1V8_ONLY, + PULL_TYPE_IO_DEFAULT, + PULL_TYPE_IO_DEFAULT, + PULL_TYPE_IO_1V8_ONLY, + PULL_TYPE_IO_1V8_ONLY + ), PIN_BANK_DRV_FLAGS(3, 32, "gpio3", DRV_TYPE_IO_3V3_ONLY, DRV_TYPE_IO_3V3_ONLY, DRV_TYPE_IO_3V3_ONLY, DRV_TYPE_IO_1V8_OR_3V0 ), - PIN_BANK_DRV_FLAGS(4, 32, "gpio4", DRV_TYPE_IO_1V8_OR_3V0, - DRV_TYPE_IO_1V8_3V0_AUTO, - DRV_TYPE_IO_1V8_OR_3V0, - DRV_TYPE_IO_1V8_OR_3V0 - ), + PIN_BANK_DRV_FLAGS_ROUTE(4, 32, "gpio4", 0x01090100, + DRV_TYPE_IO_1V8_OR_3V0, + DRV_TYPE_IO_1V8_3V0_AUTO, + DRV_TYPE_IO_1V8_OR_3V0, + DRV_TYPE_IO_1V8_OR_3V0 + ), }; static struct rockchip_pin_ctrl rk3399_pin_ctrl = { @@ -3311,6 +3422,7 @@ static int rockchip_pinctrl_probe(struct platform_device *pdev) .pmu_drv_offset = 0x80, .pull_calc_reg = rk3399_calc_pull_reg_and_bit, .drv_calc_reg = rk3399_calc_drv_reg_and_bit, + .iomux_route = rk3399_set_mux_route, }; static const struct of_device_id rockchip_pinctrl_dt_match[] = {