From patchwork Sat Jul 8 04:25:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Wu X-Patchwork-Id: 9831375 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 062BB602A0 for ; Sat, 8 Jul 2017 04:22:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E8EC828509 for ; Sat, 8 Jul 2017 04:22:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DC7372851A; Sat, 8 Jul 2017 04:22:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6B1E428509 for ; Sat, 8 Jul 2017 04:22:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=8EKdAJa6YhZHHqLQVVGAeQGSWcYIpYGaquNYWfZRsDA=; b=CZR9DlcoBC+B/dj1LQMnphl1+p ikThTQxDrbXRUQfCkNtJ4uToSbRFJtIU5O5QY6YuVflUAi5GvqfQAlmvY/bdL7+DglEiQaSs2LQ4m idnQRf7iFjSkP3N+iuTEvEUTfF8jp3hm16kDC50by7o9p/1/9X5pWrSsCFCq0SZM4YIYSNtROkC/N 38TsUF7Mnpbh8EgyaKvgg2t4giPvHNyYBRheir7haK3EyysONtB8Hu8E+Cq6iN5+8zJMUNRi/kSmc JReVl8ftcG/up585IjiPhbuNwpIbU5YLTzOSKNsfH9I8zA7X7vSZfy0QGRfE6Ijm9NpvtF9d8Z1T6 IRNMHyYA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dThG0-00016w-FI; Sat, 08 Jul 2017 04:22:12 +0000 Received: from lucky1.263xmail.com ([211.157.147.130]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dThFo-0000vN-A9; Sat, 08 Jul 2017 04:22:02 +0000 Received: from david.wu?rock-chips.com (unknown [192.168.167.205]) by lucky1.263xmail.com (Postfix) with ESMTP id 0BFF51EEEF5; Sat, 8 Jul 2017 12:21:36 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTPA id CF48A363; Sat, 8 Jul 2017 12:21:34 +0800 (CST) X-RL-SENDER: david.wu@rock-chips.com X-FST-TO: thierry.reding@gmail.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: david.wu@rock-chips.com X-UNIQUE-TAG: <50cf2620e57310e1deeebc9ce01314d3> X-ATTACHMENT-NUM: 0 X-SENDER: wdc@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith ESMTP id 17414P1T9ER; Sat, 08 Jul 2017 12:21:36 +0800 (CST) From: David Wu To: thierry.reding@gmail.com, heiko@sntech.de, boris.brezillon@free-electrons.com, robh+dt@kernel.org Subject: [RESEND PATCH v2 6/7] pwm: rockchip: Add rk3328 pwm support Date: Sat, 8 Jul 2017 12:25:42 +0800 Message-Id: <1499487942-5302-1-git-send-email-david.wu@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1499486629-9659-1-git-send-email-david.wu@rock-chips.com> References: <1499486629-9659-1-git-send-email-david.wu@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170707_212200_936208_15CD58C9 X-CRM114-Status: GOOD ( 13.69 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, huangtao@rock-chips.com, linux-pwm@vger.kernel.org, catalin.marinas@arm.com, briannorris@chromium.org, dianders@chromium.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, David Wu , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The rk3328 soc supports atomic update, we could lock the configuration of period and duty at first, after unlock is configured, the period and duty are effective at the same time. If the polarity, period and duty need to be configured together, the way for atomic update is "configure lock and old polarity" -> "configure period and duty" -> "configure unlock and new polarity". Signed-off-by: David Wu Acked-by: Rob Herring --- change in v2: - 3 different pwm_ops apply(),one for each IP revision. .../devicetree/bindings/pwm/pwm-rockchip.txt | 1 + drivers/pwm/pwm-rockchip.c | 63 ++++++++++++++++++++-- 2 files changed, 60 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt index 2350ef9..152c736 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt @@ -4,6 +4,7 @@ Required properties: - compatible: should be "rockchip,-pwm" "rockchip,rk2928-pwm": found on RK29XX,RK3066 and RK3188 SoCs "rockchip,rk3288-pwm": found on RK3288 SoC + "rockchip,rk3328-pwm": found on RK3328 SoC "rockchip,vop-pwm": found integrated in VOP on RK3288 SoC - reg: physical base address and length of the controller's registers - clocks: See ../clock/clock-bindings.txt diff --git a/drivers/pwm/pwm-rockchip.c b/drivers/pwm/pwm-rockchip.c index 83703e1..838e8fc 100644 --- a/drivers/pwm/pwm-rockchip.c +++ b/drivers/pwm/pwm-rockchip.c @@ -29,6 +29,7 @@ #define PWM_INACTIVE_POSITIVE (1 << 4) #define PWM_POLARITY_MASK (PWM_DUTY_POSITIVE | PWM_INACTIVE_POSITIVE) #define PWM_OUTPUT_LEFT (0 << 5) +#define PWM_LOCK_EN (1 << 6) #define PWM_LP_DISABLE (0 << 8) struct rockchip_pwm_chip { @@ -124,13 +125,24 @@ static void rockchip_pwm_get_state(struct pwm_chip *chip, } static int rockchip_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, - struct pwm_state *state, bool polarity) + struct pwm_state *state, bool polarity, + bool lock) { struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip); unsigned long period, duty; u64 clk_rate, div; u32 ctrl; + /* + * Lock the period and duty of previous configuration, then + * change the duty and period, that would not be effective. + */ + ctrl = readl_relaxed(pc->base + pc->data->regs.ctrl); + if (lock) { + ctrl |= PWM_LOCK_EN; + writel_relaxed(ctrl, pc->base + pc->data->regs.ctrl); + } + clk_rate = clk_get_rate(pc->clk); /* @@ -148,7 +160,6 @@ static int rockchip_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, writel(period, pc->base + pc->data->regs.period); writel(duty, pc->base + pc->data->regs.duty); - ctrl = readl_relaxed(pc->base + pc->data->regs.ctrl); if (polarity) { ctrl &= ~PWM_POLARITY_MASK; if (state->polarity == PWM_POLARITY_INVERSED) @@ -156,6 +167,15 @@ static int rockchip_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, else ctrl |= PWM_DUTY_POSITIVE | PWM_INACTIVE_NEGATIVE; } + + /* + * Unlock and set polarity at the same time, + * the configuration of duty, period and polarity + * would be effective together at next period. + */ + if (lock) + ctrl &= ~PWM_LOCK_EN; + writel(ctrl, pc->base + pc->data->regs.ctrl); return 0; @@ -209,7 +229,7 @@ static int rockchip_pwm_apply_v1(struct pwm_chip *chip, struct pwm_device *pwm, enabled = false; } - rockchip_pwm_config(chip, pwm, state, false); + rockchip_pwm_config(chip, pwm, state, false, false); if (state->enabled != enabled) ret = rockchip_pwm_enable(chip, pwm, state->enabled, enable_conf); @@ -236,7 +256,27 @@ static int rockchip_pwm_apply_v2(struct pwm_chip *chip, struct pwm_device *pwm, enabled = false; } - rockchip_pwm_config(chip, pwm, state, true); + rockchip_pwm_config(chip, pwm, state, true, false); + if (state->enabled != enabled) + ret = rockchip_pwm_enable(chip, pwm, state->enabled, + enable_conf); + + return ret; +} + +static int rockchip_pwm_apply_v3(struct pwm_chip *chip, struct pwm_device *pwm, + struct pwm_state *state) +{ + u32 enable_conf = PWM_OUTPUT_LEFT | PWM_LP_DISABLE | PWM_ENABLE | + PWM_CONTINUOUS; + struct pwm_state curstate; + bool enabled; + int ret = 0; + + pwm_get_state(pwm, &curstate); + enabled = curstate.enabled; + + rockchip_pwm_config(chip, pwm, state, true, true); if (state->enabled != enabled) ret = rockchip_pwm_enable(chip, pwm, state->enabled, enable_conf); @@ -317,9 +357,24 @@ static int rockchip_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, .pwm_apply = rockchip_pwm_apply_v2, }; +static const struct rockchip_pwm_data pwm_data_v3 = { + .regs = { + .duty = 0x08, + .period = 0x04, + .cntr = 0x00, + .ctrl = 0x0c, + }, + .prescaler = 1, + .supports_polarity = true, + .ops = &rockchip_pwm_ops, + .get_state = rockchip_pwm_get_state_v2, + .pwm_apply = rockchip_pwm_apply_v3, +}; + static const struct of_device_id rockchip_pwm_dt_ids[] = { { .compatible = "rockchip,rk2928-pwm", .data = &pwm_data_v1}, { .compatible = "rockchip,rk3288-pwm", .data = &pwm_data_v2}, + { .compatible = "rockchip,rk3328-pwm", .data = &pwm_data_v3}, { .compatible = "rockchip,vop-pwm", .data = &pwm_data_vop}, { /* sentinel */ } };