From patchwork Wed Sep 13 10:09:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Wu X-Patchwork-Id: 9950879 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 955556024A for ; Wed, 13 Sep 2017 10:11:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8614428ED9 for ; Wed, 13 Sep 2017 10:11:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7911E28F8E; Wed, 13 Sep 2017 10:11:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED,RCVD_IN_SORBS_SPAM,RCVD_IN_SORBS_WEB autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id EB10E28ED9 for ; Wed, 13 Sep 2017 10:11:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=f4befJEGJLXiXfeO3f99QBJ0RHI/EXm1rhkN/OVLu6k=; b=uNpE/Lzcj6OPrngHOv2rIAAJgu mb9tMEDudTANjaQsI7XZt0zXq0qs5wTKibgneLuQI5KDRCQcB9EJfejaC3xd5BRmo14f9iNd9YZXW 0qHzMqoT+03me19mFPJywyvqtzAPUK0/FiHDl1rydOsGiqW+4UIuIULJHTQPpLIHKUxnCorH7tLu/ XktqW2CpvTtL8N0GWg6r4xsFO6UYyYhRnQrX9DvAEgW79QUyS+3LlfmooHc1OVpngBkifKyNhGI5n pfusf5GICgVXt6sUlTsTaj6Fqsq2kYCexBO5aPbZr556o5XjNERLKfYld4SjCkCUBv+1ndE92u67G g5NrjTPg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1ds4dc-0003Bu-9p; Wed, 13 Sep 2017 10:11:20 +0000 Received: from lucky1.263xmail.com ([211.157.147.133]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1ds4dY-00035Z-8e for linux-rockchip@lists.infradead.org; Wed, 13 Sep 2017 10:11:18 +0000 Received: from david.wu?rock-chips.com (unknown [192.168.167.229]) by lucky1.263xmail.com (Postfix) with ESMTP id 1E7748F9F9; Wed, 13 Sep 2017 18:10:50 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTPA id A650D369; Wed, 13 Sep 2017 18:10:49 +0800 (CST) X-RL-SENDER: david.wu@rock-chips.com X-FST-TO: sjg@chromium.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: david.wu@rock-chips.com X-UNIQUE-TAG: <4cffa11d5a86d7df1e0b81015ec63bb1> X-ATTACHMENT-NUM: 0 X-SENDER: wdc@rock-chips.com X-DNS-TYPE: 0 Received: from unknown (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith SMTP id 15417623RZ0; Wed, 13 Sep 2017 18:10:51 +0800 (CST) From: David Wu To: sjg@chromium.org, philipp.tomsich@theobroma-systems.com Subject: [PATCH 1/8] adc: Add driver for Rockchip Saradc Date: Wed, 13 Sep 2017 18:09:32 +0800 Message-Id: <1505297379-12638-2-git-send-email-david.wu@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1505297379-12638-1-git-send-email-david.wu@rock-chips.com> References: <1505297379-12638-1-git-send-email-david.wu@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170913_031116_869096_FC2C6141 X-CRM114-Status: GOOD ( 15.40 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangtao@rock-chips.com, heiko@sntech.de, u-boot@lists.denx.de, zhangqing@rock-chips.com, kever.yang@rock-chips.com, linux-rockchip@lists.infradead.org, p.marczak@samsung.com, David Wu , andy.yan@rock-chips.com, chenjh@rock-chips.com MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The ADC can support some channels signal-ended some bits Successive Approximation Register (SAR) A/D Converter, like 6-channel and 10-bit. It converts the analog input signal into some bits binary digital codes. Signed-off-by: David Wu Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- drivers/adc/Kconfig | 9 ++ drivers/adc/Makefile | 1 + drivers/adc/rockchip-saradc.c | 188 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 198 insertions(+) create mode 100644 drivers/adc/rockchip-saradc.c diff --git a/drivers/adc/Kconfig b/drivers/adc/Kconfig index e5335f7..830fe0f 100644 --- a/drivers/adc/Kconfig +++ b/drivers/adc/Kconfig @@ -20,6 +20,15 @@ config ADC_EXYNOS - 12-bit resolution - 600 KSPS of sample rate +config SARADC_ROCKCHIP + bool "Enable Rockchip SARADC driver" + help + This enables driver for Rockchip SARADC. + It provides: + - 2~6 analog input channels + - 1O-bit resolution + - 1MSPS of sample rate + config ADC_SANDBOX bool "Enable Sandbox ADC test driver" help diff --git a/drivers/adc/Makefile b/drivers/adc/Makefile index cebf26d..4b5aa69 100644 --- a/drivers/adc/Makefile +++ b/drivers/adc/Makefile @@ -8,3 +8,4 @@ obj-$(CONFIG_ADC) += adc-uclass.o obj-$(CONFIG_ADC_EXYNOS) += exynos-adc.o obj-$(CONFIG_ADC_SANDBOX) += sandbox.o +obj-$(CONFIG_SARADC_ROCKCHIP) += rockchip-saradc.o diff --git a/drivers/adc/rockchip-saradc.c b/drivers/adc/rockchip-saradc.c new file mode 100644 index 0000000..5c7c3d9 --- /dev/null +++ b/drivers/adc/rockchip-saradc.c @@ -0,0 +1,188 @@ +/* + * (C) Copyright 2017, Fuzhou Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Rockchip Saradc driver for U-Boot + */ + +#include +#include +#include +#include +#include +#include + +#define SARADC_DATA 0x00 + +#define SARADC_STAS 0x04 +#define SARADC_STAS_BUSY BIT(0) + +#define SARADC_CTRL 0x08 +#define SARADC_CTRL_POWER_CTRL BIT(3) +#define SARADC_CTRL_CHN_MASK 0x7 +#define SARADC_CTRL_IRQ_STATUS BIT(6) +#define SARADC_CTRL_IRQ_ENABLE BIT(5) + +#define SARADC_DLY_PU_SOC 0x0c + +#define SARADC_TIMEOUT (100 * 1000) + +struct rockchip_saradc_data { + int num_bits; + int num_channels; + unsigned long clk_rate; +}; + +struct rockchip_saradc_priv { + fdt_addr_t regs; + int active_channel; + const struct rockchip_saradc_data *data; +}; + +int rockchip_saradc_channel_data(struct udevice *dev, int channel, + unsigned int *data) +{ + struct rockchip_saradc_priv *priv = dev_get_priv(dev); + + if (channel != priv->active_channel) { + error("Requested channel is not active!"); + return -EINVAL; + } + + if ((readl(priv->regs + SARADC_CTRL) & SARADC_CTRL_IRQ_STATUS) != SARADC_CTRL_IRQ_STATUS) + return -EBUSY; + + /* Read value */ + *data = readl(priv->regs + SARADC_DATA); + *data &= (1 << priv->data->num_bits) - 1; + + /* Power down adc */ + writel(0, priv->regs + SARADC_CTRL); + + return 0; +} + +int rockchip_saradc_start_channel(struct udevice *dev, int channel) +{ + struct rockchip_saradc_priv *priv = dev_get_priv(dev); + + if (channel < 0 || channel >= priv->data->num_channels) { + error("Requested channel is invalid!"); + return -EINVAL; + } + + /* 8 clock periods as delay between power up and start cmd */ + writel(8, priv->regs + SARADC_DLY_PU_SOC); + + /* Select the channel to be used and trigger conversion */ + writel(SARADC_CTRL_POWER_CTRL + | (channel & SARADC_CTRL_CHN_MASK) | SARADC_CTRL_IRQ_ENABLE, + priv->regs + SARADC_CTRL); + + priv->active_channel = channel; + + return 0; +} + +int rockchip_saradc_stop(struct udevice *dev) +{ + struct rockchip_saradc_priv *priv = dev_get_priv(dev); + + /* Power down adc */ + writel(0, priv->regs + SARADC_CTRL); + + priv->active_channel = -1; + + return 0; +} + +int rockchip_saradc_probe(struct udevice *dev) +{ + struct rockchip_saradc_priv *priv = dev_get_priv(dev); + struct clk clk; + int ret; + + ret = clk_get_by_index(dev, 0, &clk); + if (ret) + return ret; + + ret = clk_set_rate(&clk, priv->data->clk_rate); + if (IS_ERR_VALUE(ret)) + return ret; + + priv->active_channel = -1; + + return 0; +} + +int rockchip_saradc_ofdata_to_platdata(struct udevice *dev) +{ + struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev); + struct rockchip_saradc_priv *priv = dev_get_priv(dev); + struct rockchip_saradc_data *data = + (struct rockchip_saradc_data *)dev_get_driver_data(dev); + + priv->regs = devfdt_get_addr(dev); + if (priv->regs == FDT_ADDR_T_NONE) { + error("Dev: %s - can't get address!", dev->name); + return -ENODATA; + } + + priv->data = data; + uc_pdata->data_mask = (1 << priv->data->num_bits) - 1;; + uc_pdata->data_format = ADC_DATA_FORMAT_BIN; + uc_pdata->data_timeout_us = SARADC_TIMEOUT / 5; + uc_pdata->channel_mask = (1 << priv->data->num_channels) - 1; + + return 0; +} + +static const struct adc_ops rockchip_saradc_ops = { + .start_channel = rockchip_saradc_start_channel, + .channel_data = rockchip_saradc_channel_data, + .stop = rockchip_saradc_stop, +}; + +static const struct rockchip_saradc_data saradc_data = { + .num_bits = 10, + .num_channels = 3, + .clk_rate = 1000000, +}; + +static const struct rockchip_saradc_data rk3066_tsadc_data = { + .num_bits = 12, + .num_channels = 2, + .clk_rate = 50000, +}; + +static const struct rockchip_saradc_data rk3399_saradc_data = { + .num_bits = 10, + .num_channels = 6, + .clk_rate = 1000000, +}; + +static const struct udevice_id rockchip_saradc_ids[] = { + { + .compatible = "rockchip,saradc", + .data = (ulong)&saradc_data, + }, + { + .compatible = "rockchip,rk3066-tsadc", + .data = (ulong)&rk3066_tsadc_data, + }, { + .compatible = "rockchip,rk3399-saradc", + .data = (ulong)&rk3399_saradc_data, + }, + { } +}; + +U_BOOT_DRIVER(rockchip_saradc) = { + .name = "rockchip_saradc", + .id = UCLASS_ADC, + .of_match = rockchip_saradc_ids, + .ops = &rockchip_saradc_ops, + .probe = rockchip_saradc_probe, + .ofdata_to_platdata = rockchip_saradc_ofdata_to_platdata, + .priv_auto_alloc_size = sizeof(struct rockchip_saradc_priv), +};