From patchwork Sat Sep 17 02:32:49 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ziyuan X-Patchwork-Id: 9336923 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2F97F607FF for ; Sat, 17 Sep 2016 02:33:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 276E0205AD for ; Sat, 17 Sep 2016 02:33:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1B8B529D97; Sat, 17 Sep 2016 02:33:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D3822205AD for ; Sat, 17 Sep 2016 02:33:41 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bl5Rl-0002xq-6v; Sat, 17 Sep 2016 02:33:41 +0000 Received: from regular1.263xmail.com ([211.150.99.135]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bl5Rh-0002uA-My for linux-rockchip@lists.infradead.org; Sat, 17 Sep 2016 02:33:39 +0000 Received: from xzy.xu?rock-chips.com (unknown [192.168.167.177]) by regular1.263xmail.com (Postfix) with ESMTP id A12431DD42; Sat, 17 Sep 2016 10:33:13 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED4: 1 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id E8A4F39F; Sat, 17 Sep 2016 10:33:12 +0800 (CST) X-RL-SENDER: xzy.xu@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 103.29.142.67 X-LOGIN-NAME: xzy.xu@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-SENDER: xzy.xu@rock-chips.com X-DNS-TYPE: 0 Received: from unknown (unknown [103.29.142.67]) by smtp.263.net (Postfix) whith SMTP id 20842GXYJ73; Sat, 17 Sep 2016 10:33:14 +0800 (CST) From: Ziyuan Xu To: heiko@sntech.de, ulf.hansson@linaro.org, robh+dt@kernel.org Subject: [PATCH v3 1/2] Documentation: mmc: sdhci-of-arasan: add description of power domain Date: Sat, 17 Sep 2016 10:32:49 +0800 Message-Id: <20160917023250.1159-2-xzy.xu@rock-chips.com> X-Mailer: git-send-email 2.9.2 In-Reply-To: <20160917023250.1159-1-xzy.xu@rock-chips.com> References: <20160917023250.1159-1-xzy.xu@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160916_193338_632805_ED7A4D8E X-CRM114-Status: UNSURE ( 5.15 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Ziyuan Xu , shawn.lin@rock-chips.com, zhangqing@rock-chips.com, linux-mmc@vger.kernel.org, dianders@chromium.org, linux-rockchip@lists.infradead.org MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add power domain as a optional property for sdhci-of-arasan, which can be turned off in the so-called unused condition, such as suspend and remove. Aim to lower power requirements. Signed-off-by: Ziyuan Xu Acked-by: Rob Herring Reviewed-by: Heiko Stuebner --- Changes in v3: - fix a typo - add Rob's ack-tag Changes in v2: - fix a typo - add an example code for power-domain Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt index 3404afa..eb84d29 100644 --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt @@ -1,12 +1,14 @@ Device Tree Bindings for the Arasan SDHCI Controller - The bindings follow the mmc[1], clock[2], interrupt[3] and phy[4] bindings. + The bindings follow the mmc[1], clock[2], interrupt[3], phy[4] and power + domain[5] bindings. Only deviations are documented here. [1] Documentation/devicetree/bindings/mmc/mmc.txt [2] Documentation/devicetree/bindings/clock/clock-bindings.txt [3] Documentation/devicetree/bindings/interrupt-controller/interrupts.txt [4] Documentation/devicetree/bindings/phy/phy-bindings.txt + [5] Documentation/devicetree/bindings/power/power_domain.txt Required Properties: - compatible: Compatibility string. One of: @@ -36,6 +38,8 @@ Optional Properties: - #clock-cells: If specified this should be the value <0>. With this property in place we will export a clock representing the Card Clock. This clock is expected to be consumed by our PHY. You must also specify + - power-domains: A phandle and PM domain as specifier defined by bindings + of the power controller specified by phandle. Example: sdhci@e0100000 { @@ -71,5 +75,6 @@ Example: phys = <&emmc_phy>; phy-names = "phy_arasan"; #clock-cells = <0>; + power-domains = <&power RK3399_PD_EMMC>; status = "disabled"; };