From patchwork Wed Jan 17 15:25:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeffy Chen X-Patchwork-Id: 10169547 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0EEA7603B5 for ; Wed, 17 Jan 2018 15:28:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F194D285A2 for ; Wed, 17 Jan 2018 15:28:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E5FC028610; Wed, 17 Jan 2018 15:28:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 65640285A2 for ; Wed, 17 Jan 2018 15:28:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=z7Tq95zEBb9NpphF+HC5miDDJvL/QCDIWe7b55nXeaY=; b=cARxO9d30bzoZ87ESOf3xgQXr2 dxFBujTYafw4yT2VqeYewhxlXSMmsxFlE6K9oQDte3RRmNUlDAXgN+aLx4TyvladqCNFaI/eT97zh /CQFcE3t6EUt8Doe7IVCDz6eC5QIciQ+pt0c6vk08NL4+ejJsPkKAHf45GnNw1g3GZfDX6v48FzYH /EtUuKiR8JmbGwK4qwBwB82z7SQjS9MM7YSHL0xowcrniglbzvIhCpSk56n5lMvzED05tP653goYa Y4ug2gbZr7y+ZsE5S0N/Hmy/ee393jleD2MiL7opUXHQc6K+gKybjdFZOBsFu57034z8SsilIi9fj LbczsdGg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.89 #1 (Red Hat Linux)) id 1ebpdV-0007Gr-UC; Wed, 17 Jan 2018 15:28:21 +0000 Received: from regular1.263xmail.com ([211.150.99.134]) by bombadil.infradead.org with esmtps (Exim 4.89 #1 (Red Hat Linux)) id 1ebpcK-0005hc-V1; Wed, 17 Jan 2018 15:27:29 +0000 Received: from jeffy.chen?rock-chips.com (unknown [192.168.167.83]) by regular1.263xmail.com (Postfix) with ESMTP id BA0FD8125; Wed, 17 Jan 2018 23:26:51 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTPA id 16352360; Wed, 17 Jan 2018 23:26:45 +0800 (CST) X-RL-SENDER: jeffy.chen@rock-chips.com X-FST-TO: linux-kernel@vger.kernel.org X-SENDER-IP: 103.29.142.67 X-LOGIN-NAME: jeffy.chen@rock-chips.com X-UNIQUE-TAG: <9c59af17f9338fae81cb4241a9947bcb> X-ATTACHMENT-NUM: 0 X-SENDER: cjf@rock-chips.com X-DNS-TYPE: 0 Received: from localhost (unknown [103.29.142.67]) by smtp.263.net (Postfix) whith ESMTP id 32493NRF9I9; Wed, 17 Jan 2018 23:26:53 +0800 (CST) From: Jeffy Chen To: linux-kernel@vger.kernel.org Subject: [PATCH v3 07/12] iommu/rockchip: Control clocks needed to access the IOMMU Date: Wed, 17 Jan 2018 23:25:37 +0800 Message-Id: <20180117152542.26429-8-jeffy.chen@rock-chips.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180117152542.26429-1-jeffy.chen@rock-chips.com> References: <20180117152542.26429-1-jeffy.chen@rock-chips.com> X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, xxm@rock-chips.com, Joerg Roedel , Jeffy Chen , tfiga@chromium.org, jcliang@chromium.org, linux-rockchip@lists.infradead.org, iommu@lists.linux-foundation.org, Rob Herring , robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org, Heiko Stuebner MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Tomasz Figa Current code relies on master driver enabling necessary clocks before IOMMU is accessed, however there are cases when the IOMMU should be accessed while the master is not running yet, for example allocating V4L2 videobuf2 buffers, which is done by the VB2 framework using DMA mapping API and doesn't engage the master driver at all. This patch fixes the problem by letting clocks needed for IOMMU operation to be listed in Device Tree and making the driver enable them for the time of accessing the hardware. Signed-off-by: Jeffy Chen Signed-off-by: Tomasz Figa --- Changes in v3: None Changes in v2: None .../devicetree/bindings/iommu/rockchip,iommu.txt | 8 ++ drivers/iommu/rockchip-iommu.c | 114 +++++++++++++++++++-- 2 files changed, 116 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt index 2098f7732264..33dd853359fa 100644 --- a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt +++ b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt @@ -14,6 +14,13 @@ Required properties: "single-master" device, and needs no additional information to associate with its master device. See: Documentation/devicetree/bindings/iommu/iommu.txt +Optional properties: +- clocks : A list of master clocks requires for the IOMMU to be accessible + by the host CPU. The number of clocks depends on the master + block and might as well be zero. See [1] for generic clock + bindings description. + +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt Optional properties: - rockchip,disable-mmu-reset : Don't use the mmu reset operation. @@ -27,5 +34,6 @@ Example: reg = <0xff940300 0x100>; interrupts = ; interrupt-names = "vopl_mmu"; + clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>; #iommu-cells = <0>; }; diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c index 1914ac52042c..9b85a3050449 100644 --- a/drivers/iommu/rockchip-iommu.c +++ b/drivers/iommu/rockchip-iommu.c @@ -4,6 +4,7 @@ * published by the Free Software Foundation. */ +#include #include #include #include @@ -89,6 +90,8 @@ struct rk_iommu { struct device *dev; void __iomem **bases; int num_mmu; + struct clk **clocks; + int num_clocks; bool reset_disabled; struct iommu_device iommu; struct list_head node; /* entry in rk_iommu_domain.iommus */ @@ -443,6 +446,83 @@ static int rk_iommu_force_reset(struct rk_iommu *iommu) return 0; } +static void rk_iommu_put_clocks(struct rk_iommu *iommu) +{ + int i; + + for (i = 0; i < iommu->num_clocks; ++i) { + clk_unprepare(iommu->clocks[i]); + clk_put(iommu->clocks[i]); + } +} + +static int rk_iommu_get_clocks(struct rk_iommu *iommu) +{ + struct device_node *np = iommu->dev->of_node; + int ret; + int i; + + ret = of_count_phandle_with_args(np, "clocks", "#clock-cells"); + if (ret == -ENOENT) + return 0; + else if (ret < 0) + return ret; + + iommu->num_clocks = ret; + iommu->clocks = devm_kcalloc(iommu->dev, iommu->num_clocks, + sizeof(*iommu->clocks), GFP_KERNEL); + if (!iommu->clocks) + return -ENOMEM; + + for (i = 0; i < iommu->num_clocks; ++i) { + iommu->clocks[i] = of_clk_get(np, i); + if (IS_ERR(iommu->clocks[i])) { + iommu->num_clocks = i; + goto err_clk_put; + } + ret = clk_prepare(iommu->clocks[i]); + if (ret) { + clk_put(iommu->clocks[i]); + iommu->num_clocks = i; + goto err_clk_put; + } + } + + return 0; + +err_clk_put: + rk_iommu_put_clocks(iommu); + + return ret; +} + +static int rk_iommu_enable_clocks(struct rk_iommu *iommu) +{ + int i, ret; + + for (i = 0; i < iommu->num_clocks; ++i) { + ret = clk_enable(iommu->clocks[i]); + if (ret) + goto err_disable; + } + + return 0; + +err_disable: + for (--i; i >= 0; --i) + clk_disable(iommu->clocks[i]); + + return ret; +} + +static void rk_iommu_disable_clocks(struct rk_iommu *iommu) +{ + int i; + + for (i = 0; i < iommu->num_clocks; ++i) + clk_disable(iommu->clocks[i]); +} + static void log_iova(struct rk_iommu *iommu, int index, dma_addr_t iova) { void __iomem *base = iommu->bases[index]; @@ -499,6 +579,8 @@ static irqreturn_t rk_iommu_irq(int irq, void *dev_id) irqreturn_t ret = IRQ_NONE; int i; + WARN_ON(rk_iommu_enable_clocks(iommu)); + for (i = 0; i < iommu->num_mmu; i++) { int_status = rk_iommu_read(iommu->bases[i], RK_MMU_INT_STATUS); if (int_status == 0) @@ -545,6 +627,8 @@ static irqreturn_t rk_iommu_irq(int irq, void *dev_id) rk_iommu_write(iommu->bases[i], RK_MMU_INT_CLEAR, int_status); } + rk_iommu_disable_clocks(iommu); + return ret; } @@ -587,7 +671,9 @@ static void rk_iommu_zap_iova(struct rk_iommu_domain *rk_domain, list_for_each(pos, &rk_domain->iommus) { struct rk_iommu *iommu; iommu = list_entry(pos, struct rk_iommu, node); + rk_iommu_enable_clocks(iommu); rk_iommu_zap_lines(iommu, iova, size); + rk_iommu_disable_clocks(iommu); } spin_unlock_irqrestore(&rk_domain->iommus_lock, flags); } @@ -816,10 +902,14 @@ static int rk_iommu_attach_device(struct iommu_domain *domain, if (!iommu) return 0; - ret = rk_iommu_enable_stall(iommu); + ret = rk_iommu_enable_clocks(iommu); if (ret) return ret; + ret = rk_iommu_enable_stall(iommu); + if (ret) + goto err_disable_clocks; + ret = rk_iommu_force_reset(iommu); if (ret) goto err_disable_stall; @@ -844,11 +934,14 @@ static int rk_iommu_attach_device(struct iommu_domain *domain, dev_dbg(dev, "Attached to iommu domain\n"); rk_iommu_disable_stall(iommu); + rk_iommu_disable_clocks(iommu); return 0; err_disable_stall: rk_iommu_disable_stall(iommu); +err_disable_clocks: + rk_iommu_disable_clocks(iommu); return ret; } @@ -871,6 +964,7 @@ static void rk_iommu_detach_device(struct iommu_domain *domain, spin_unlock_irqrestore(&rk_domain->iommus_lock, flags); /* Ignore error while disabling, just keep going */ + WARN_ON(rk_iommu_enable_clocks(iommu)); rk_iommu_enable_stall(iommu); rk_iommu_disable_paging(iommu); for (i = 0; i < iommu->num_mmu; i++) { @@ -878,6 +972,7 @@ static void rk_iommu_detach_device(struct iommu_domain *domain, rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR, 0); } rk_iommu_disable_stall(iommu); + rk_iommu_disable_clocks(iommu); iommu->domain = NULL; @@ -1167,21 +1262,28 @@ static int rk_iommu_probe(struct platform_device *pdev) return err; } + err = rk_iommu_get_clocks(iommu); + if (err) + return err; + iommu->reset_disabled = device_property_read_bool(dev, "rockchip,disable-mmu-reset"); err = iommu_device_sysfs_add(&iommu->iommu, dev, NULL, dev_name(dev)); if (err) - return err; + goto err_put_clocks; iommu_device_set_ops(&iommu->iommu, &rk_iommu_ops); err = iommu_device_register(&iommu->iommu); - if (err) { - iommu_device_sysfs_remove(&iommu->iommu); - return err; - } + if (err) + goto err_remove_sysfs; return 0; +err_remove_sysfs: + iommu_device_sysfs_remove(&iommu->iommu); +err_put_clocks: + rk_iommu_put_clocks(iommu); + return err; } static const struct of_device_id rk_iommu_dt_ids[] = {