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[1/3] arm64: dts: rockchip: introduce pclk_vio_grf in eDP device node

Message ID 20180207163150.16332-1-enric.balletbo@collabora.com (mailing list archive)
State New, archived
Headers show

Commit Message

Enric Balletbo i Serra Feb. 7, 2018, 4:31 p.m. UTC 
From: Yakir Yang <ykk@rock-chips.com>

The pclk_vio_grf supply power for VIO GRF IOs, if it is disabled,
driver would failed to operate the VIO GRF registers.

The clock is optional but one of the side effects of don't have this clk
is that the Samsung Chromebook Plus fails to recover display after a
suspend/resume with following errors:

    rockchip-dp ff970000.edp: Input stream clock not detected.
    rockchip-dp ff970000.edp: Timeout of video streamclk ok
    rockchip-dp ff970000.edp: unable to config video

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Heiko Stuebner Feb. 9, 2018, 9:45 a.m. UTC | #1 
Am Mittwoch, 7. Februar 2018, 17:31:48 CET schrieb Enric Balletbo i Serra:
> From: Yakir Yang <ykk@rock-chips.com>
> 
> The pclk_vio_grf supply power for VIO GRF IOs, if it is disabled,
> driver would failed to operate the VIO GRF registers.
> 
> The clock is optional but one of the side effects of don't have this clk
> is that the Samsung Chromebook Plus fails to recover display after a
> suspend/resume with following errors:
> 
>     rockchip-dp ff970000.edp: Input stream clock not detected.
>     rockchip-dp ff970000.edp: Timeout of video streamclk ok
>     rockchip-dp ff970000.edp: unable to config video
> 
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>

as you said in IRC that his should also fix the failures when rockchip-drm
is build as module, I've applied this patch as fix for 4.16


Thanks
Heiko
diff mbox

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 9551e773ff78..beef28f7309d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1741,8 +1741,8 @@ 
 		compatible = "rockchip,rk3399-edp";
 		reg = <0x0 0xff970000 0x0 0x8000>;
 		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
-		clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>;
-		clock-names = "dp", "pclk";
+		clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>, <&cru PCLK_VIO_GRF>;
+		clock-names = "dp", "pclk", "grf";
 		pinctrl-names = "default";
 		pinctrl-0 = <&edp_hpd>;
 		power-domains = <&power RK3399_PD_EDP>;