From patchwork Fri Feb 16 12:09:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Enric Balletbo i Serra X-Patchwork-Id: 10224609 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D0A5E603EE for ; Fri, 16 Feb 2018 12:14:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BE873290B3 for ; Fri, 16 Feb 2018 12:14:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B2A4329157; Fri, 16 Feb 2018 12:14:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 54F4F29414 for ; Fri, 16 Feb 2018 12:14:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=eKwoiNpwYAKgotn4EAiJSnAfxBAEM20iEmK7r+182M0=; b=F30+1tjAW+GOHoecXgJE96NAx+ +AhSBSrm1vA66iR9fURxCmXYZfpdqPsguaRV2N22A215mrYkshHYlW3W6OLeigI3vqGmCYiOB0nk5 Rl0OSXd50KlNBDt8lSHMj2KTRSlZqkpZAIuCDFQZMhdeI5Vq8luCkdc44FngG/D2GYVfmaCWLtUx7 urEWVT49DVr+LfBhIkz/PakSwNee9wpSIjcGTlHonVuB5OvhhNJ4a+7IN6c8vlCabfIeUdg5s1kAh MKzQ96/5LaF1NGnxZvw2x5twM3lxNveafrpayqE4SrkZeXLn8MMTbEBIrh23VxFl2ypFtHxUYA4I2 qnldaEZQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.89 #1 (Red Hat Linux)) id 1emeuX-0000co-KP; Fri, 16 Feb 2018 12:14:41 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by bombadil.infradead.org with esmtps (Exim 4.89 #1 (Red Hat Linux)) id 1emeqM-0004ea-An; Fri, 16 Feb 2018 12:10:29 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id BD22A2751C1 From: Enric Balletbo i Serra To: Rob Herring , Kishon Vijay Abraham I , Brian Norris Subject: [PATCH v3 3/6] phy: rockchip-typec: enable usb3 host during usb3 phy power on Date: Fri, 16 Feb 2018 13:09:53 +0100 Message-Id: <20180216120956.19034-3-enric.balletbo@collabora.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180216120956.19034-1-enric.balletbo@collabora.com> References: <20180216120956.19034-1-enric.balletbo@collabora.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180216_041022_762711_0CB6B7C3 X-CRM114-Status: GOOD ( 14.09 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, hl@rock-chips.com, dianders@chromium.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Chris Zhong , William wu , kernel@collabora.com, linux-arm-kernel@lists.infradead.org, Heiko Stuebner MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: William wu We have forced usb3 to work in usb2 only mode in firmware by setting usb3tousb2_en (bit3 of GRF_USB3PHY0/1_CON0) to 1, and setting host_u3_port_disable (bit0 of GRF_USB3OTG0/1_CON1) to 1 and host_u3_port (bit15~12 of GRF_USB3OTG0/1_CON1) to 0. So we need to re-enable usb3 host. Note that the RK3399 TRM suggests that we should keep the whole usb3 controller in reset for the duration of the Type-C PHY initialization. However, it's hard to assert the reset in the current framework of reset. And according to the TRM, it doesn't require that we should clear the usb3tousb2 bit before pipe ready. So let's enable the usb3 host after pipe ready to avoid the Type-C PHY initialization failure. Signed-off-by: William wu Signed-off-by: Enric Balletbo i Serra Reviewed-by: Heiko Stuebner --- Changes since v2: - None. Changes since v1: - Use the registers offsets from the driver not the DT. drivers/phy/rockchip/phy-rockchip-typec.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c index 5f660f6b9f95..54dc52a948ef 100644 --- a/drivers/phy/rockchip/phy-rockchip-typec.c +++ b/drivers/phy/rockchip/phy-rockchip-typec.c @@ -362,6 +362,8 @@ struct usb3phy_reg { * @usb3tousb2_en: the register of type-c force usb2 to usb2 enable. * @external_psm: the register of type-c phy external psm clock. * @pipe_status: the register of type-c phy pipe status. + * @usb3_host_disable: the register of type-c usb3 host disable. + * @usb3_host_port: the register of type-c usb3 host port. */ struct rockchip_usb3phy_port_cfg { unsigned int reg; @@ -369,6 +371,8 @@ struct rockchip_usb3phy_port_cfg { struct usb3phy_reg usb3tousb2_en; struct usb3phy_reg external_psm; struct usb3phy_reg pipe_status; + struct usb3phy_reg usb3_host_disable; + struct usb3phy_reg usb3_host_port; }; struct rockchip_typec_phy { @@ -440,6 +444,8 @@ static const struct rockchip_usb3phy_port_cfg rk3399_usb3phy_port_cfgs[] = { .usb3tousb2_en = { 0xe580, 3, 19 }, .external_psm = { 0xe588, 14, 30 }, .pipe_status = { 0xe5c0, 0, 0 }, + .usb3_host_disable = { 0x2434, 0, 16 }, + .usb3_host_port = { 0x2434, 12, 28 }, }, { .reg = 0xff800000, @@ -447,6 +453,8 @@ static const struct rockchip_usb3phy_port_cfg rk3399_usb3phy_port_cfgs[] = { .usb3tousb2_en = { 0xe58c, 3, 19 }, .external_psm = { 0xe594, 14, 30 }, .pipe_status = { 0xe5c0, 16, 16 }, + .usb3_host_disable = { 0x2444, 0, 16 }, + .usb3_host_port = { 0x2444, 12, 28 }, }, { /* sentinel */ } }; @@ -879,6 +887,9 @@ static int rockchip_usb3_phy_power_on(struct phy *phy) regmap_read(tcphy->grf_regs, reg->offset, &val); if (!(val & BIT(reg->enable_bit))) { tcphy->mode |= new_mode & (MODE_DFP_USB | MODE_UFP_USB); + /* enable usb3 host */ + property_enable(tcphy, &cfg->usb3_host_disable, 0); + property_enable(tcphy, &cfg->usb3_host_port, 1); goto unlock_ret; } usleep_range(10, 20);