Message ID | 20180305222324.5872-16-enric.balletbo@collabora.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Hi All, This is the patch, which introduces the issue I've pointed here: https://lists.freedesktop.org/archives/dri-devel/2018-March/167794.html On 2018-03-05 23:23, Enric Balletbo i Serra wrote: > From: Lin Huang <hl@rock-chips.com> > > When panel is shut down, we should make sure edp can be disabled to avoid > undefined behavior. > > Cc: Stéphane Marchesin <marcheu@chromium.org> > Signed-off-by: Lin Huang <hl@rock-chips.com> > Signed-off-by: zain wang <wzz@rock-chips.com> > Signed-off-by: Sean Paul <seanpaul@chromium.org> > Signed-off-by: Thierry Escande <thierry.escande@collabora.com> > Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> > Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> > --- > > drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c > index 92fb9a072cb6..9b7d530ad24c 100644 > --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c > +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c > @@ -1160,6 +1160,12 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp) > > pm_runtime_get_sync(dp->dev); > > + ret = clk_prepare_enable(dp->clock); > + if (ret < 0) { > + DRM_ERROR("Failed to prepare_enable the clock clk [%d]\n", ret); > + goto out_dp_clk_pre; > + } > + > if (dp->plat_data->power_on) > dp->plat_data->power_on(dp->plat_data); > > @@ -1191,6 +1197,8 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp) > phy_power_off(dp->phy); > if (dp->plat_data->power_off) > dp->plat_data->power_off(dp->plat_data); > + clk_disable_unprepare(dp->clock); > +out_dp_clk_pre: > pm_runtime_put_sync(dp->dev); > > return ret; > @@ -1234,10 +1242,13 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge) > > disable_irq(dp->irq); > phy_power_off(dp->phy); > + analogix_dp_set_analog_power_down(dp, POWER_ALL, 1); In case of Exynos DP, external PHY is used to power the DP block, so no register access should be performed after phy_power_off(). Please move analogix_dp_set_analog_power_down() before phy_power_off(). > > if (dp->plat_data->power_off) > dp->plat_data->power_off(dp->plat_data); > > + clk_disable_unprepare(dp->clock); > + > pm_runtime_put_sync(dp->dev); > > ret = analogix_dp_prepare_panel(dp, false, true); Best regards
Hi Marek, On 06/03/18 08:35, Marek Szyprowski wrote: > Hi All, > > This is the patch, which introduces the issue I've pointed here: > > https://lists.freedesktop.org/archives/dri-devel/2018-March/167794.html > > On 2018-03-05 23:23, Enric Balletbo i Serra wrote: >> From: Lin Huang <hl@rock-chips.com> >> >> When panel is shut down, we should make sure edp can be disabled to avoid >> undefined behavior. >> >> Cc: Stéphane Marchesin <marcheu@chromium.org> >> Signed-off-by: Lin Huang <hl@rock-chips.com> >> Signed-off-by: zain wang <wzz@rock-chips.com> >> Signed-off-by: Sean Paul <seanpaul@chromium.org> >> Signed-off-by: Thierry Escande <thierry.escande@collabora.com> >> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> >> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> >> --- >> >> drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 11 +++++++++++ >> 1 file changed, 11 insertions(+) >> >> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c >> b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c >> index 92fb9a072cb6..9b7d530ad24c 100644 >> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c >> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c >> @@ -1160,6 +1160,12 @@ static int analogix_dp_set_bridge(struct >> analogix_dp_device *dp) >> pm_runtime_get_sync(dp->dev); >> + ret = clk_prepare_enable(dp->clock); >> + if (ret < 0) { >> + DRM_ERROR("Failed to prepare_enable the clock clk [%d]\n", ret); >> + goto out_dp_clk_pre; >> + } >> + >> if (dp->plat_data->power_on) >> dp->plat_data->power_on(dp->plat_data); >> @@ -1191,6 +1197,8 @@ static int analogix_dp_set_bridge(struct >> analogix_dp_device *dp) >> phy_power_off(dp->phy); >> if (dp->plat_data->power_off) >> dp->plat_data->power_off(dp->plat_data); >> + clk_disable_unprepare(dp->clock); >> +out_dp_clk_pre: >> pm_runtime_put_sync(dp->dev); >> return ret; >> @@ -1234,10 +1242,13 @@ static void analogix_dp_bridge_disable(struct >> drm_bridge *bridge) >> disable_irq(dp->irq); >> phy_power_off(dp->phy); >> + analogix_dp_set_analog_power_down(dp, POWER_ALL, 1); > > In case of Exynos DP, external PHY is used to power the DP block, so no > register access should be performed after phy_power_off(). Please move > analogix_dp_set_analog_power_down() before phy_power_off(). > Oh, sorry, I missed that change, I'll include in next version, but I will wait a little bit more before send for if I receive feedback on the others patches. >> if (dp->plat_data->power_off) >> dp->plat_data->power_off(dp->plat_data); >> + clk_disable_unprepare(dp->clock); >> + >> pm_runtime_put_sync(dp->dev); >> ret = analogix_dp_prepare_panel(dp, false, true); > > Best regards Enric
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c index 92fb9a072cb6..9b7d530ad24c 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c @@ -1160,6 +1160,12 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp) pm_runtime_get_sync(dp->dev); + ret = clk_prepare_enable(dp->clock); + if (ret < 0) { + DRM_ERROR("Failed to prepare_enable the clock clk [%d]\n", ret); + goto out_dp_clk_pre; + } + if (dp->plat_data->power_on) dp->plat_data->power_on(dp->plat_data); @@ -1191,6 +1197,8 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp) phy_power_off(dp->phy); if (dp->plat_data->power_off) dp->plat_data->power_off(dp->plat_data); + clk_disable_unprepare(dp->clock); +out_dp_clk_pre: pm_runtime_put_sync(dp->dev); return ret; @@ -1234,10 +1242,13 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge) disable_irq(dp->irq); phy_power_off(dp->phy); + analogix_dp_set_analog_power_down(dp, POWER_ALL, 1); if (dp->plat_data->power_off) dp->plat_data->power_off(dp->plat_data); + clk_disable_unprepare(dp->clock); + pm_runtime_put_sync(dp->dev); ret = analogix_dp_prepare_panel(dp, false, true);