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Mon, 29 Oct 2018 02:00:54 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6091:9d4b:9d82:66b9:3ee6:ffac]) by smtp.gmail.com with ESMTPSA id m11-v6sm28265245pfi.102.2018.10.29.02.00.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 29 Oct 2018 02:00:54 -0700 (PDT) From: Manivannan Sadhasivam To: robh@kernel.org, heiko@sntech.de, ezequiel@collabora.com, xuwei5@hisilicon.com, michal.simek@xilinx.com, pavel@ucw.cz, andy.gross@linaro.org Subject: [PATCH v2 2/7] arm64: dts: rockchip: rock960: Add on-board LED support Date: Mon, 29 Oct 2018 14:30:01 +0530 Message-Id: <20181029090006.4353-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181029090006.4353-1-manivannan.sadhasivam@linaro.org> References: <20181029090006.4353-1-manivannan.sadhasivam@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181029_050107_405225_8CFE5B9A X-CRM114-Status: GOOD ( 11.58 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, daniel.thompson@linaro.org, linux-arm-msm@vger.kernel.org, linus.walleij@linaro.org, linux-kernel@vger.kernel.org, amit.kucheria@linaro.org, linux-rockchip@lists.infradead.org, koen.kooi@linaro.org, linux-leds@vger.kernel.org, Manivannan Sadhasivam , nicolas.dechesne@linaro.org, linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add on-board LED support for Rock960 board based on the following standard used by rest of the 96Boards: green:user1 default-trigger: heartbeat green:user2 default-trigger: mmc0/disk-activity(onboard-storage) green:user3 default-trigger: mmc1 (SD-card) green:user4 default-trigger: none, panic-indicator yellow:wlan default-trigger: phy0tx blue:bt default-trigger: hci0-power Signed-off-by: Manivannan Sadhasivam --- .../boot/dts/rockchip/rk3399-rock960.dts | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts index 3c3308daec98..12285c51cceb 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts @@ -13,6 +13,53 @@ chosen { stdout-path = "serial2:1500000n8"; }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&user_led1>, <&user_led2>, <&user_led3>, + <&user_led4>, <&wlan_led>, <&bt_led>; + + user_led1 { + label = "green:user1"; + gpios = <&gpio4 RK_PC2 0>; + linux,default-trigger = "heartbeat"; + }; + + user_led2 { + label = "green:user2"; + gpios = <&gpio4 RK_PC6 0>; + linux,default-trigger = "mmc0"; + }; + + user_led3 { + label = "green:user3"; + gpios = <&gpio4 RK_PD0 0>; + linux,default-trigger = "mmc1"; + }; + + user_led4 { + label = "green:user4"; + gpios = <&gpio4 RK_PD4 0>; + panic-indicator; + linux,default-trigger = "none"; + }; + + wlan_active_led { + label = "yellow:wlan"; + gpios = <&gpio4 RK_PD5 0>; + linux,default-trigger = "phy0tx"; + default-state = "off"; + }; + + bt_active_led { + label = "blue:bt"; + gpios = <&gpio4 RK_PD6 0>; + linux,default-trigger = "hci0-power"; + default-state = "off"; + }; + }; + }; &pcie0 { @@ -20,6 +67,38 @@ }; &pinctrl { + leds { + user_led1: user_led1 { + rockchip,pins = + <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + user_led2: user_led2 { + rockchip,pins = + <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + user_led3: user_led3 { + rockchip,pins = + <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + user_led4: user_led4 { + rockchip,pins = + <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + wlan_led: wlan_led { + rockchip,pins = + <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_led: bt_led { + rockchip,pins = + <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + pcie { pcie_drv: pcie-drv { rockchip,pins =