From patchwork Thu Apr 25 07:12:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris Brezillon X-Patchwork-Id: 10916167 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B7FA114DB for ; Thu, 25 Apr 2019 07:13:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9F67328B1E for ; Thu, 25 Apr 2019 07:13:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 904D528B22; Thu, 25 Apr 2019 07:13:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 24FFE28B1E for ; Thu, 25 Apr 2019 07:13:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0L8PYY1EYYxqLDlOtp3+9rj4XrK3oVr1l7unyXzVoXs=; b=rT+0bptvbTaYmb zSI3tG3SKQmUxpGJb9EkcYanyVI18wOBVrMIgIsnhl7/JnASoqcasK8RJqCctkeiWBTXaPCn4t+tY EAAu2rmruvEOdyO5XOSJFzH8BGrzALGjovKuRPglLfeZmuOM1XbbULwiVzU8c8aCcTTARSTf5rewa oFH3QFfcLuUZhWGuXTVcJVjAYHTLpcp/OH7dLOfsfme6p5QYTJbfDol2bgwdxg+rks9+9fTgJUjgt LcPnK95+djXyMX37VDGu8E+I0vgH5HpKVtWBAzMuFfD1JFtFSucP1LID9fT73rsWK9FSzwzj+vP98 X9Lfq6AGwplFQ80lf4tQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hJYZN-0001nr-Rd; Thu, 25 Apr 2019 07:13:21 +0000 Received: from bhuna.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e3e3]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hJYZ1-0001Kb-0F for linux-rockchip@lists.infradead.org; Thu, 25 Apr 2019 07:13:10 +0000 Received: from localhost.localdomain (unknown [IPv6:2a01:e0a:2c:6930:5cf4:84a1:2763:fe0d]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: bbrezillon) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id 73DAB282F73; Thu, 25 Apr 2019 08:12:54 +0100 (BST) From: Boris Brezillon To: Mauro Carvalho Chehab , Hans Verkuil , Laurent Pinchart , Sakari Ailus , linux-media@vger.kernel.org Subject: [PATCH v4 15/21] rockchip/vpu: Provide a helper to reset both src and dst formats Date: Thu, 25 Apr 2019 09:12:36 +0200 Message-Id: <20190425071242.18315-16-boris.brezillon@collabora.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190425071242.18315-1-boris.brezillon@collabora.com> References: <20190425071242.18315-1-boris.brezillon@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190425_001259_547289_675376D8 X-CRM114-Status: GOOD ( 14.52 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomasz Figa , Heiko Stuebner , Jonas Karlman , Nicolas Dufresne , Paul Kocialkowski , linux-rockchip@lists.infradead.org, Boris Brezillon , kernel@collabora.com, Ezequiel Garcia Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP When initializing a context, the core wants to reset both src and dst formats. Right now the order doesn't matter, but if we want to have a valid default width/height on the non-coded/raw format side (src in case of encoders, dst in case of decoders), we need to reset those formats in the right order: first the coded-format side, then the other, such that width and height on the raw format side can be taken from the coded format. Let's provide a helper that will reset both formats and make sure this is done in the right order. Signed-off-by: Boris Brezillon --- Changes from v2: * None Changes from v2: * New patch --- .../staging/media/rockchip/vpu/rockchip_vpu_drv.c | 3 +-- .../staging/media/rockchip/vpu/rockchip_vpu_v4l2.c | 14 ++++++++++---- .../staging/media/rockchip/vpu/rockchip_vpu_v4l2.h | 5 +---- 3 files changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/staging/media/rockchip/vpu/rockchip_vpu_drv.c b/drivers/staging/media/rockchip/vpu/rockchip_vpu_drv.c index ec18578d55d7..d85b88067b03 100644 --- a/drivers/staging/media/rockchip/vpu/rockchip_vpu_drv.c +++ b/drivers/staging/media/rockchip/vpu/rockchip_vpu_drv.c @@ -273,8 +273,7 @@ static int rockchip_vpu_open(struct file *filp) filp->private_data = &ctx->fh; v4l2_fh_add(&ctx->fh); - rockchip_vpu_reset_dst_fmt(vpu, ctx); - rockchip_vpu_reset_src_fmt(vpu, ctx); + rockchip_vpu_reset_fmts(ctx); ret = rockchip_vpu_ctrls_setup(vpu, ctx); if (ret) { diff --git a/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.c b/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.c index bd019b64fcb2..f14cd6fdbcba 100644 --- a/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.c +++ b/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.c @@ -262,8 +262,8 @@ vidioc_try_fmt_out_mplane(struct file *file, void *priv, struct v4l2_format *f) return 0; } -void rockchip_vpu_reset_dst_fmt(struct rockchip_vpu_dev *vpu, - struct rockchip_vpu_ctx *ctx) +static void rockchip_vpu_reset_dst_fmt(struct rockchip_vpu_dev *vpu, + struct rockchip_vpu_ctx *ctx) { struct v4l2_pix_format_mplane *fmt = &ctx->dst_fmt; @@ -287,8 +287,8 @@ void rockchip_vpu_reset_dst_fmt(struct rockchip_vpu_dev *vpu, fmt->width * fmt->height * ctx->vpu_dst_fmt->max_depth; } -void rockchip_vpu_reset_src_fmt(struct rockchip_vpu_dev *vpu, - struct rockchip_vpu_ctx *ctx) +static void rockchip_vpu_reset_src_fmt(struct rockchip_vpu_dev *vpu, + struct rockchip_vpu_ctx *ctx) { struct v4l2_pix_format_mplane *fmt = &ctx->src_fmt; unsigned int width, height; @@ -310,6 +310,12 @@ void rockchip_vpu_reset_src_fmt(struct rockchip_vpu_dev *vpu, v4l2_fill_pixfmt_mp(fmt, ctx->vpu_src_fmt->fourcc, width, height); } +void rockchip_vpu_reset_fmts(struct rockchip_vpu_ctx *ctx) +{ + rockchip_vpu_reset_dst_fmt(ctx->dev, ctx); + rockchip_vpu_reset_src_fmt(ctx->dev, ctx); +} + static int vidioc_s_fmt_out_mplane(struct file *file, void *priv, struct v4l2_format *f) { diff --git a/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.h b/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.h index 816bd3988218..493e8751d22d 100644 --- a/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.h +++ b/drivers/staging/media/rockchip/vpu/rockchip_vpu_v4l2.h @@ -21,9 +21,6 @@ extern const struct v4l2_ioctl_ops rockchip_vpu_ioctl_ops; extern const struct vb2_ops rockchip_vpu_queue_ops; -void rockchip_vpu_reset_src_fmt(struct rockchip_vpu_dev *vpu, - struct rockchip_vpu_ctx *ctx); -void rockchip_vpu_reset_dst_fmt(struct rockchip_vpu_dev *vpu, - struct rockchip_vpu_ctx *ctx); +void rockchip_vpu_reset_fmts(struct rockchip_vpu_ctx *ctx); #endif /* ROCKCHIP_VPU_V4L2_H_ */