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Thu, 02 May 2019 12:50:35 -0700 (PDT) From: Sean Paul To: dri-devel@lists.freedesktop.org Subject: [PATCH v3 09/10] drm/rockchip: Don't fully disable vop on self refresh Date: Thu, 2 May 2019 15:49:51 -0400 Message-Id: <20190502194956.218441-10-sean@poorly.run> X-Mailer: git-send-email 2.21.0.593.g511ec345e18-goog In-Reply-To: <20190502194956.218441-1-sean@poorly.run> References: <20190502194956.218441-1-sean@poorly.run> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190502_125036_925601_89B9A8F6 X-CRM114-Status: GOOD ( 15.17 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Zain Wang , =?utf-8?q?Heiko_St=C3=BCbner?= , David Airlie , linux-kernel@vger.kernel.org, Sandy Huang , Tomasz Figa , linux-rockchip@lists.infradead.org, Sean Paul , Daniel Vetter , "Kristian H . Kristensen" , linux-arm-kernel@lists.infradead.org Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Sean Paul Instead of fully disabling and re-enabling the vop on self refresh transitions, only disable the active windows. This will speed up self refresh exits substantially and is still a power-savings win. This patch integrates portions of Zain's patch from here: https://patchwork.kernel.org/patch/9615063/ Changes in v2: - None Changes in v3: - None Link to v1: https://patchwork.freedesktop.org/patch/msgid/20190228210939.83386-5-sean@poorly.run Link to v2: https://patchwork.freedesktop.org/patch/msgid/20190326204509.96515-4-sean@poorly.run Cc: Zain Wang Cc: Tomasz Figa Cc: Kristian H. Kristensen Signed-off-by: Sean Paul --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 38 +++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 45a38a332827..d171d90418c8 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -134,6 +134,7 @@ struct vop { bool is_enabled; struct completion dsp_hold_completion; + unsigned int win_enabled; /* protected by dev->event_lock */ struct drm_pending_vblank_event *event; @@ -594,6 +595,7 @@ static int vop_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) const struct vop_win_data *win = vop_win->data; VOP_WIN_SET(vop, win, enable, 0); + vop->win_enabled &= ~BIT(i); } } spin_unlock(&vop->reg_lock); @@ -624,6 +626,25 @@ static int vop_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) return ret; } +static void rockchip_drm_set_win_enabled(struct drm_crtc *crtc, bool enabled) +{ + struct vop *vop = to_vop(crtc); + int i; + + spin_lock(&vop->reg_lock); + + for (i = 0; i < vop->data->win_size; i++) { + struct vop_win *vop_win = &vop->win[i]; + const struct vop_win_data *win = vop_win->data; + + VOP_WIN_SET(vop, win, enable, + enabled && (vop->win_enabled & BIT(i))); + } + vop_cfg_done(vop); + + spin_unlock(&vop->reg_lock); +} + static void vop_crtc_atomic_disable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) { @@ -631,9 +652,15 @@ static void vop_crtc_atomic_disable(struct drm_crtc *crtc, WARN_ON(vop->event); + if (crtc->state->self_refresh_active) + rockchip_drm_set_win_enabled(crtc, false); + mutex_lock(&vop->vop_lock); drm_crtc_vblank_off(crtc); + if (crtc->state->self_refresh_active) + goto out; + /* * Vop standby will take effect at end of current frame, * if dsp hold valid irq happen, it means standby complete. @@ -664,6 +691,8 @@ static void vop_crtc_atomic_disable(struct drm_crtc *crtc, clk_disable(vop->dclk); vop_core_clks_disable(vop); pm_runtime_put(vop->dev); + +out: mutex_unlock(&vop->vop_lock); if (crtc->state->event && !crtc->state->active) { @@ -744,6 +773,7 @@ static void vop_plane_atomic_disable(struct drm_plane *plane, spin_lock(&vop->reg_lock); VOP_WIN_SET(vop, win, enable, 0); + vop->win_enabled &= ~BIT(VOP_WIN_TO_INDEX(vop_win)); spin_unlock(&vop->reg_lock); } @@ -882,6 +912,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane, } VOP_WIN_SET(vop, win, enable, 1); + vop->win_enabled |= BIT(win_index); spin_unlock(&vop->reg_lock); } @@ -1038,6 +1069,12 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc, int dither_bpc = s->output_bpc ? s->output_bpc : 10; int ret; + if (old_state && old_state->self_refresh_active) { + drm_crtc_vblank_on(crtc); + rockchip_drm_set_win_enabled(crtc, true); + return; + } + mutex_lock(&vop->vop_lock); WARN_ON(vop->event); @@ -1648,6 +1685,7 @@ static int vop_initial(struct vop *vop) VOP_WIN_SET(vop, win, channel, (channel + 1) << 4 | channel); VOP_WIN_SET(vop, win, enable, 0); VOP_WIN_SET(vop, win, gate, 1); + vop->win_enabled &= ~BIT(i); } vop_cfg_done(vop);