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Tue, 07 May 2019 13:49:57 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:1:24fa:e766:52c9:e3b2]) by smtp.gmail.com with ESMTPSA id x19sm8312796pga.4.2019.05.07.13.49.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 07 May 2019 13:49:56 -0700 (PDT) From: Douglas Anderson To: Stephen Boyd , Heiko Stuebner Subject: [PATCH] clk: rockchip: Use clk_hw_get_rate() in MMC phase calculation Date: Tue, 7 May 2019 13:49:35 -0700 Message-Id: <20190507204935.256982-1-dianders@chromium.org> X-Mailer: git-send-email 2.21.0.1020.gf2820cf01a-goog MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190507_134958_582471_114EF7B8 X-CRM114-Status: GOOD ( 10.40 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: hal@halemmerich.com, Michael Turquette , linux-clk@vger.kernel.org, Douglas Anderson , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Shawn Lin , linux-arm-kernel@lists.infradead.org Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP When calculating the MMC phase we can just use clk_hw_get_rate() instead of clk_get_rate(). This avoids recalculating the rate. Suggested-by: Stephen Boyd Signed-off-by: Douglas Anderson --- drivers/clk/rockchip/clk-mmc-phase.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/rockchip/clk-mmc-phase.c b/drivers/clk/rockchip/clk-mmc-phase.c index 026a26bb702d..07526f64dbfd 100644 --- a/drivers/clk/rockchip/clk-mmc-phase.c +++ b/drivers/clk/rockchip/clk-mmc-phase.c @@ -55,7 +55,7 @@ static unsigned long rockchip_mmc_recalc(struct clk_hw *hw, static int rockchip_mmc_get_phase(struct clk_hw *hw) { struct rockchip_mmc_clock *mmc_clock = to_mmc_clock(hw); - unsigned long rate = clk_get_rate(hw->clk); + unsigned long rate = clk_hw_get_rate(hw); u32 raw_value; u16 degrees; u32 delay_num = 0; @@ -86,7 +86,7 @@ static int rockchip_mmc_get_phase(struct clk_hw *hw) static int rockchip_mmc_set_phase(struct clk_hw *hw, int degrees) { struct rockchip_mmc_clock *mmc_clock = to_mmc_clock(hw); - unsigned long rate = clk_get_rate(hw->clk); + unsigned long rate = clk_hw_get_rate(hw); u8 nineties, remainder; u8 delay_num; u32 raw_value;