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bh=DwfpjIE8nKMsbRS0x/+1oo0yx+ro2f51EemJbqL5udQ=; b=nUSHShTad8jCv8XB8UDfEKZkXhu6Rd4N8zA7DL8rdtdM99l3ZOjr3sx6BaNF+pxQvq r4SHB77hmJWuqeI3Y4SLmjrtX3BOHI+1sGAmRmglCkTufnKmd4QazFDCifpiIEtByXsu Oj7ZoL+k7DEF+M1MNHK3T0uVbkjWIjocuUKORrFjHZnuagvmDp4779Fkkwtlf073AZcV epPW4UsvCvRr29qg+kemHQRG72QjAmKevmPpCJEdj0BBCEBK+prUcZRhSI5ErYtqai9x 5HKNbmRFUXMzK7muLU4RARPAgZ30Gyzrwh95upZscptANXrpzgRmMZC6C9bP4zlG5qVH CP3Q== X-Gm-Message-State: AGi0PuYQ6oFbMJdKeGROcsBUuxkR93DMJ84N5PzN5M2zaTwcItUcQfGz 9i41X7PxKmJ8sPP2CGlJLgtqSQ== X-Google-Smtp-Source: APiQypLrr2XVDSB/1ZKBkCGa9Vky4FSKD/3eUXzPMlFsYgy3L7Q34I3snTn81u/NVRYjqgVISl0KEQ== X-Received: by 2002:aa7:9d84:: with SMTP id f4mr2089513pfq.290.1588230294757; Thu, 30 Apr 2020 00:04:54 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:6514:3619:d1af:85f6]) by smtp.gmail.com with ESMTPSA id p64sm964143pjp.7.2020.04.30.00.04.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Apr 2020 00:04:53 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Subject: [PATCH v2 8/8] rockchip: Enable PCIe/M.2 on rock960 board Date: Thu, 30 Apr 2020 12:34:12 +0530 Message-Id: <20200430070412.12499-9-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200430070412.12499-1-jagan@amarulasolutions.com> References: <20200430070412.12499-1-jagan@amarulasolutions.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200430_000455_353011_046A1EFF X-CRM114-Status: GOOD ( 10.14 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:444 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: patrick@blueri.se, linux-rockchip@lists.infradead.org, Tom Cubie , Manivannan Sadhasivam , u-boot@lists.denx.de, Jagan Teki , sunil@amarulasolutions.com, linux-amarula@amarulasolutions.com MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org Due to some on board limitation rock960 PCIe works only with 1.8V IO domain. So, this patch enables grf io_sel explicitly to make PCIe/M.2 to work. Cc: Tom Cubie Cc: Manivannan Sadhasivam Signed-off-by: Jagan Teki Acked-by: Manivannan Sadhasivam --- Changes for v2: - none board/vamrs/rock960_rk3399/rock960-rk3399.c | 20 ++++++++++++++++++++ configs/rock960-rk3399_defconfig | 5 +++++ 2 files changed, 25 insertions(+) diff --git a/board/vamrs/rock960_rk3399/rock960-rk3399.c b/board/vamrs/rock960_rk3399/rock960-rk3399.c index 68a127b9ac..98d62e89ca 100644 --- a/board/vamrs/rock960_rk3399/rock960-rk3399.c +++ b/board/vamrs/rock960_rk3399/rock960-rk3399.c @@ -2,3 +2,23 @@ /* * Copyright (C) 2018 Manivannan Sadhasivam */ + +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_MISC_INIT_R +int misc_init_r(void) +{ + struct rk3399_grf_regs *grf = + syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + + /* BT565 is in 1.8v domain */ + rk_setreg(&grf->io_vsel, BIT(0)); + + return 0; +} +#endif diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig index c4e954731a..cb1ec3c26b 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig @@ -9,6 +9,7 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb" +CONFIG_MISC_INIT_R=y CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y @@ -19,6 +20,7 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_CMD_PMIC=y @@ -36,10 +38,13 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_DM_ETH=y +CONFIG_NVME=y +CONFIG_PCI=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y +CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y