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bh=VPg039izGsBvlHYInKALMlOUd753kCr+XH9uCUo1MNQ=; b=WctsEkLctJA6YzaxfzxHh+gh4iVcfS+EEH63ArpVdlDZLzApc9ddoq/UMb/LWnbwkg 5oM8h5A8+y5fRPH+APzsqE35yx2MR+hAxqvIt6ZhqnlMWOW8DLpo0NG9pjrHPy+s0DoC /MG4nlwvyrvjYx6cOiujNShmljAjq6599CedvieR4mxn9Ywv5zACnwsufbU2+4RKkrFN alM+8CN2RNrYh9Bp2+cYdruR2TQuPdQox5bcKaNq9Z0cjDsrxv5NWuI6KLsAgYNzqH23 fcmYP+8BZoyss0WHta0pvcsxTNf0T4LU15MhQyorp1eXBS2BOXFoGLyaBYPc8PJ0w4aT 9Rqg== X-Gm-Message-State: AGi0PubKiaVjE2Z/xcNy9S3C00H6EHWGBEp6z5lZF3yLDZnIsPQYcLlI nApeHsGDAx2wSJf2HC7KvrNJ5A== X-Google-Smtp-Source: APiQypK4EOZ5z+BQGkkDlpK2f4vR04o+56LHeYiezivfOmeqL9eUXpOQ+nAu+SnqLm3kZe/6fMxIQg== X-Received: by 2002:a17:90a:d808:: with SMTP id a8mr7677278pjv.6.1588751465387; Wed, 06 May 2020 00:51:05 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:c598:8eeb:af7:7f36]) by smtp.gmail.com with ESMTPSA id y186sm1011133pfy.66.2020.05.06.00.51.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 May 2020 00:51:04 -0700 (PDT) From: Jagan Teki To: kever.yang@rock-chips.com, philipp.tomsich@theobroma-systems.com, Simon Glass , Frank Wang , wmc@rock-chips.com, chenjh@rock-chips.com, heiko@sntech.de Subject: [PATCH v2 5/7] arm64: dts: rk3399: Move u2phy into root port Date: Wed, 6 May 2020 13:20:23 +0530 Message-Id: <20200506075025.1677-6-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200506075025.1677-1-jagan@amarulasolutions.com> References: <20200506075025.1677-1-jagan@amarulasolutions.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200506_005105_942716_2C0E7D39 X-CRM114-Status: GOOD ( 12.87 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:1043 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jagan Teki , u-boot@lists.denx.de, Belisko Marek , linux-amarula@amarulasolutions.com, linux-rockchip@lists.infradead.org MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org Yes, This is changing the actual device tree u2phy structure but the problem with the current Generic PHY subsystem is unable to find PHY if the PHY node is not part of the root structure. This will be reverted once we support the PHY subsystem to get the PHY even though it is not part of the root node or any other relevant solution. Signed-off-by: Jagan Teki --- Changes for v2: - none arch/arm/dts/rk3399.dtsi | 108 +++++++++++++++++++-------------------- 1 file changed, 54 insertions(+), 54 deletions(-) diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi index 74f2c3d490..6c77f25f23 100644 --- a/arch/arm/dts/rk3399.dtsi +++ b/arch/arm/dts/rk3399.dtsi @@ -1387,60 +1387,6 @@ status = "disabled"; }; - u2phy0: usb2-phy@e450 { - compatible = "rockchip,rk3399-usb2phy"; - reg = <0xe450 0x10>; - clocks = <&cru SCLK_USB2PHY0_REF>; - clock-names = "phyclk"; - #clock-cells = <0>; - clock-output-names = "clk_usbphy0_480m"; - status = "disabled"; - - u2phy0_host: host-port { - #phy-cells = <0>; - interrupts = ; - interrupt-names = "linestate"; - status = "disabled"; - }; - - u2phy0_otg: otg-port { - #phy-cells = <0>; - interrupts = , - , - ; - interrupt-names = "otg-bvalid", "otg-id", - "linestate"; - status = "disabled"; - }; - }; - - u2phy1: usb2-phy@e460 { - compatible = "rockchip,rk3399-usb2phy"; - reg = <0xe460 0x10>; - clocks = <&cru SCLK_USB2PHY1_REF>; - clock-names = "phyclk"; - #clock-cells = <0>; - clock-output-names = "clk_usbphy1_480m"; - status = "disabled"; - - u2phy1_host: host-port { - #phy-cells = <0>; - interrupts = ; - interrupt-names = "linestate"; - status = "disabled"; - }; - - u2phy1_otg: otg-port { - #phy-cells = <0>; - interrupts = , - , - ; - interrupt-names = "otg-bvalid", "otg-id", - "linestate"; - status = "disabled"; - }; - }; - emmc_phy: phy@f780 { compatible = "rockchip,rk3399-emmc-phy"; reg = <0xf780 0x24>; @@ -1462,6 +1408,60 @@ }; }; + u2phy0: usb2-phy@e450 { + compatible = "rockchip,rk3399-usb2phy"; + reg = <0x0 0xe450 0x0 0x10>; + clocks = <&cru SCLK_USB2PHY0_REF>; + clock-names = "phyclk"; + #clock-cells = <0>; + clock-output-names = "clk_usbphy0_480m"; + status = "disabled"; + + u2phy0_host: host-port { + #phy-cells = <0>; + interrupts = ; + interrupt-names = "linestate"; + status = "disabled"; + }; + + u2phy0_otg: otg-port { + #phy-cells = <0>; + interrupts = , + , + ; + interrupt-names = "otg-bvalid", "otg-id", + "linestate"; + status = "disabled"; + }; + }; + + u2phy1: usb2-phy@e460 { + compatible = "rockchip,rk3399-usb2phy"; + reg = <0x0 0xe460 0x0 0x10>; + clocks = <&cru SCLK_USB2PHY1_REF>; + clock-names = "phyclk"; + #clock-cells = <0>; + clock-output-names = "clk_usbphy1_480m"; + status = "disabled"; + + u2phy1_host: host-port { + #phy-cells = <0>; + interrupts = ; + interrupt-names = "linestate"; + status = "disabled"; + }; + + u2phy1_otg: otg-port { + #phy-cells = <0>; + interrupts = , + , + ; + interrupt-names = "otg-bvalid", "otg-id", + "linestate"; + status = "disabled"; + }; + }; + tcphy0: phy@ff7c0000 { compatible = "rockchip,rk3399-typec-phy"; reg = <0x0 0xff7c0000 0x0 0x40000>;