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bh=w1+4+CJrzNg5N4mpMXT03HS2s/9IoOPydovCrS5cuzQ=; b=ZiwK1Db7yUh1ENQ5rN8Uu7nGFMg51Nv6x3pgh3iSn///BbBnMQ2Jxe7VNEivENNMsj CHCnXfrcze7mioETO2eJPQGXupBXiYmH2aLKt6D4u3QWGllsVB/xSWdwswpHBz9ba6Ay 72kABegtsrQuC/F2Fca7xG2Gcp9lVbv1fKhbqL3R9H+v0wSp/CoA/e0g+N6k7pBI4GBa ing9HDjeOjIXfYEfM7pPpMsU7HAjJOl+1ZHyY0yShbUX8svnY+fDwP+S7B/z/hfb4qlK bk++YqL8uSlnUD1OzGUuaRU+rGCLnhhWZivlLbV1mKWRT3mmCyNGuAb9dmCE8Hww5ZC3 kymw== X-Gm-Message-State: AGi0PuaHskZh3/stTZ2A0KwO4EkGcD56J7Kv2QFd/1WIX2FseGE5GWiF pDLTIUbgS8TBHv3MS3TcZJrYlA== X-Google-Smtp-Source: APiQypKTfyLZRHpX8g86Vo6JtXfDpGbOUAbDlKP/ALzvC/tJKENezdmR8CcOtRfi6GuJd953+8zhoA== X-Received: by 2002:a17:90b:4d09:: with SMTP id mw9mr13052220pjb.55.1589043421225; Sat, 09 May 2020 09:57:01 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:21f6:1c8f:ae94:fb04]) by smtp.gmail.com with ESMTPSA id x195sm4977098pfc.0.2020.05.09.09.56.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 09 May 2020 09:57:00 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Subject: [PATCH v3 6/6] rockchip: Enable PCIe/M.2 on rock960 board Date: Sat, 9 May 2020 22:26:24 +0530 Message-Id: <20200509165624.20791-7-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200509165624.20791-1-jagan@amarulasolutions.com> References: <20200509165624.20791-1-jagan@amarulasolutions.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200509_095701_737593_65148EE9 X-CRM114-Status: GOOD ( 10.06 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:1042 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: patrick@blueri.se, u-boot@lists.denx.de, Tom Cubie , shawn.lin@rock-chips.com, linux-rockchip@lists.infradead.org, Jagan Teki , sunil@amarulasolutions.com, linux-amarula@amarulasolutions.com MIME-Version: 1.0 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org Due to board limitation some SSD's would work on rock960 PCIe M.2 only with 1.8V IO domain. So, this patch enables grf io_sel explicitly to make PCIe/M.2 to work. Cc: Tom Cubie Signed-off-by: Jagan Teki Acked-by: Manivannan Sadhasivam Reviewed-by: Kever Yang --- Changes for v3: - collect mani a-b - add comments board/vamrs/rock960_rk3399/rock960-rk3399.c | 23 +++++++++++++++++++++ configs/rock960-rk3399_defconfig | 5 +++++ 2 files changed, 28 insertions(+) diff --git a/board/vamrs/rock960_rk3399/rock960-rk3399.c b/board/vamrs/rock960_rk3399/rock960-rk3399.c index 68a127b9ac..ef1eb2d0b7 100644 --- a/board/vamrs/rock960_rk3399/rock960-rk3399.c +++ b/board/vamrs/rock960_rk3399/rock960-rk3399.c @@ -2,3 +2,26 @@ /* * Copyright (C) 2018 Manivannan Sadhasivam */ + +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_MISC_INIT_R +int misc_init_r(void) +{ + struct rk3399_grf_regs *grf = + syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + + /** + * Some SSD's to work on rock960 would require explicit + * domain voltage change, so BT565 is in 1.8v domain + */ + rk_setreg(&grf->io_vsel, BIT(0)); + + return 0; +} +#endif diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig index 045d989a19..64517f9623 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig @@ -9,6 +9,7 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb" +CONFIG_MISC_INIT_R=y CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y @@ -19,6 +20,7 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_CMD_PMIC=y @@ -36,10 +38,13 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_DM_ETH=y +CONFIG_NVME=y +CONFIG_PCI=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y +CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y