From patchwork Tue Sep 29 08:32:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 11805247 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8F62D112C for ; Tue, 29 Sep 2020 08:34:44 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5A6B820759 for ; Tue, 29 Sep 2020 08:34:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="EiUdPQM7"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="IiCVmzve" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5A6B820759 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=f/CF4Dzuab9pVIuW/07OU8NTRvnLU0B3f8NQ7X2luOs=; b=EiUdPQM7peRDkmvV+2K50iANH 5RqxGim2TyvLxW0m9ugVemFVua//Fxlf9WUkAzgVMyyidRvmtroMcn7lXFhND35utSI6PxOL5ZNEY 7sWzsIWg5E3WwmyYQCvMgvjHNCHTQ8MYt7izR8aEWGDW1fdf97ra5rce4AgxX6V4qe+2qe+abtps+ V4iRyrX7CNkVeM9/JTzvKzlIiMTyhtN0KkHg/l7HmysbcTyy6tRsogoFMTainQ3+fMh5FQlqGAjNo lfbMyJhCq7w7EFquU4E7Nzm4PnHz5Va95utZrmPiIYtgPhG7ZZci3yK04IpZl8shyoq28GfvnCdYV qXqh/6gcg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kNB5q-000477-2t; Tue, 29 Sep 2020 08:34:38 +0000 Received: from mail-pj1-x1033.google.com ([2607:f8b0:4864:20::1033]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kNB4B-0003Lk-2B for linux-rockchip@lists.infradead.org; Tue, 29 Sep 2020 08:32:57 +0000 Received: by mail-pj1-x1033.google.com with SMTP id v14so2242475pjd.4 for ; Tue, 29 Sep 2020 01:32:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UiWcYyOhRC7RXRis+nbhpk3PtdnMz2h/sPkr6CWec0w=; b=IiCVmzvedVRtlcLDAz4DyjJL6JSfglyyCYsDIPmWfhrE9kOmedp5D1PU7VYqul2p1y 9AoC75EDsk6HT1bTSIEY4IQrm4ON7uVdo4qfKNS7EcM1fxmOy/DVuzhv44HEvWFR8N65 U8++8U5lr323awZlm+75dpInzlk+OAqzZ5VlY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UiWcYyOhRC7RXRis+nbhpk3PtdnMz2h/sPkr6CWec0w=; b=YzmbTFaG3oYgLLmXLBURYj1UNqMnGyf+oYrLjY7PhD6ksX5maq0A3BDDhAbllL1oQs uBoQg0zJLZLqqMllMPi+NecwFmmo5w2zKmD5YL+agXDa6ySGp29RUdPtKEbNtBiUq4yj bY7WcADLHpRbGvtGicut7NSm/ubxOvYvEHDArfqKoW4KovZDnVqQFS26sX8Y+ZkgQdly rKkN1K9Rc9Il0Y6TkAX36cD70SAguWCS54JKVBmouJcHcLPugdvKpgF29g01qm+L+h9C WIClBqCLZ9cdWuu3mIIcR101oIIYrPRCYyJ6jIGm+Mgl2eymH4hEUogLfLnbb+0mdkBF 9djA== X-Gm-Message-State: AOAM530rOrFaztgBLX874+GcfXqsALcf8GxvHMI2k0oWGKj8lx6CZx4E q/kpmiCkINaJCPiRynwT9J40Bg== X-Google-Smtp-Source: ABdhPJxcAsQPiHqm7wbJG/lPjiSE6GtzGhAZeSib8ldx2ZKwGXrnxSubt9VtXr8TD420pNW3JXFy4g== X-Received: by 2002:a17:90a:e697:: with SMTP id s23mr2888036pjy.175.1601368372751; Tue, 29 Sep 2020 01:32:52 -0700 (PDT) Received: from ub-XPS-13-9350.pdxnet.pdxeng.ch ([2405:201:c809:c7d5:b511:310d:8495:d767]) by smtp.gmail.com with ESMTPSA id 36sm3961241pgl.72.2020.09.29.01.32.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2020 01:32:52 -0700 (PDT) From: Jagan Teki To: Heiko Stuebner , Rob Herring Subject: [PATCH v4 3/7] arm64: dts: rockchip: Add Engicam PX30.Core SOM Date: Tue, 29 Sep 2020 14:02:13 +0530 Message-Id: <20200929083217.25406-4-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200929083217.25406-1-jagan@amarulasolutions.com> References: <20200929083217.25406-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200929_043255_201331_E7F6B8B6 X-CRM114-Status: GOOD ( 14.28 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:1033 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Jagan Teki , Suniel Mahesh , Michael Trimarchi , linux-amarula , linux-arm-kernel@lists.infradead.org Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org From: Michael Trimarchi PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. General features: - Rockchip PX30 - Up to 2GB DDR4 - eMMC 4 GB expandible - rest of PX30 features PX30.Core needs to mount on top of Engicam baseboards for creating complete platform boards. Possible baseboards are, - EDIMM2.2 - C.TOUCH 2.0 Add support for it. Signed-off-by: Jagan Teki Signed-off-by: Michael Trimarchi --- Changes for v4: - none Changes for v3: - sort regulator nodes properties - add Amarula Solutions copyright - update the patch author Changes for v2: - none .../boot/dts/rockchip/px30-px30-core.dtsi | 232 ++++++++++++++++++ 1 file changed, 232 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/px30-px30-core.dtsi diff --git a/arch/arm64/boot/dts/rockchip/px30-px30-core.dtsi b/arch/arm64/boot/dts/rockchip/px30-px30-core.dtsi new file mode 100644 index 000000000000..16e6cf28a440 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/px30-px30-core.dtsi @@ -0,0 +1,232 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd + * Copyright (c) 2020 Engicam srl + * Copyright (c) 2020 Amarula Solutons + * Copyright (c) 2020 Amarula Solutons(India) + */ + +#include +#include + +/ { + compatible = "engicam,px30-px30-core", "rockchip,px30"; +}; + +&cpu0 { + cpu-supply = <&vdd_arm>; +}; + +&cpu1 { + cpu-supply = <&vdd_arm>; +}; + +&cpu2 { + cpu-supply = <&vdd_arm>; +}; + +&cpu3 { + cpu-supply = <&vdd_arm>; +}; + +&emmc { + cap-mmc-highspeed; + mmc-hs200-1_8v; + non-removable; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>; + rockchip,system-power-controller; + wakeup-source; + #clock-cells = <1>; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + + vcc1-supply = <&vcc5v0_sys>; + vcc2-supply = <&vcc5v0_sys>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc5v0_sys>; + + regulators { + vdd_log: DCDC_REG1 { + regulator-name = "vdd_log"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vdd_arm: DCDC_REG2 { + regulator-name = "vdd_arm"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_3v3: DCDC_REG4 { + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc3v3_sys: DCDC_REG5 { + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_1v0: LDO_REG1 { + regulator-name = "vcc_1v0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc_1v8: LDO_REG2 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_1v0: LDO_REG3 { + regulator-name = "vdd_1v0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc3v0_pmu: LDO_REG4 { + regulator-name = "vcc3v0_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name = "vccio_sd"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc5v0_host: SWITCH_REG2 { + regulator-name = "vcc5v0_host"; + regulator-always-on; + regulator-boot-on; + }; + }; + }; +}; + +&io_domains { + vccio1-supply = <&vcc_3v3>; + vccio2-supply = <&vcc_3v3>; + vccio3-supply = <&vcc_3v3>; + vccio4-supply = <&vcc_3v3>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_1v8>; + status = "okay"; +}; + +&pinctrl { + pmic { + pmic_int: pmic_int { + rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc_3v3>; + pmuio2-supply = <&vcc_3v3>; + status = "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <1>; + status = "okay"; +};