Message ID | 20220120125156.16217-1-quentin.schulz@theobroma-systems.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | arm64: dts: rockchip: fix rk3399-puma-haikou USB OTG mode | expand |
On Thu, 20 Jan 2022 13:51:56 +0100, quentin.schulz@theobroma-systems.com wrote: > The micro USB3.0 port available on the Haikou evaluation kit for Puma > RK3399-Q7 SoM supports dual-role model (aka drd or OTG) but its support > was broken until now because of missing logic around the ID pin. > > This adds proper support for USB OTG on Puma Haikou by "connecting" the > GPIO used for USB ID to the USB3 controller device. Applied as fix for 5.17, thanks! [1/1] arm64: dts: rockchip: fix rk3399-puma-haikou USB OTG mode commit: ed2c66a95c0c5669880aa93d0d34c6e9694b4cbd I've done a bit of reordereing: - extcon comes alphabetically after dr_mode - extcon-usb3 before external-gmac... Best regards,
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts index 292bb7e80cf3..2564ef28d256 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts @@ -231,6 +231,7 @@ &usbdrd3_0 { }; &usbdrd_dwc3_0 { + extcon = <&extcon_usb3>; dr_mode = "otg"; status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi index fb67db4619ea..c9a563ae3cfd 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi @@ -32,6 +32,13 @@ clkin_gmac: external-gmac-clock { #clock-cells = <0>; }; + extcon_usb3: extcon-usb3 { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&usb3_id>; + }; + vcc1v2_phy: vcc1v2-phy { compatible = "regulator-fixed"; regulator-name = "vcc1v2_phy"; @@ -422,6 +429,13 @@ vcc5v0_host_en: vcc5v0-host-en { <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + usb3 { + usb3_id: usb3-id { + rockchip,pins = + <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; }; &sdhci {